/linux/arch/sparc/include/asm/ |
A D | asm.h | 14 #define BRANCH_REG_ZERO(PREDICT, REG, DEST) \ argument 16 #define BRANCH_REG_ZERO_ANNUL(PREDICT, REG, DEST) \ argument 18 #define BRANCH_REG_NOT_ZERO(PREDICT, REG, DEST) \ argument 20 #define BRANCH_REG_NOT_ZERO_ANNUL(PREDICT, REG, DEST) \ argument 27 #define BRANCH_REG_ZERO(PREDICT, REG, DEST) \ argument 30 #define BRANCH_REG_ZERO_ANNUL(PREDICT, REG, DEST) \ argument 33 #define BRANCH_REG_NOT_ZERO(PREDICT, REG, DEST) \ argument 36 #define BRANCH_REG_NOT_ZERO_ANNUL(PREDICT, REG, DEST) \ argument
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A D | tsb.h | 77 #define TSB_LOAD_QUAD(TSB, REG) \ argument 85 #define TSB_LOAD_TAG_HIGH(TSB, REG) \ argument 92 #define TSB_LOAD_TAG(TSB, REG) \ argument
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/linux/tools/testing/selftests/powerpc/nx-gzip/include/ |
A D | nxu.h | 432 #define get32(ST, REG) (be32toh(ST.REG)) argument 433 #define getp32(ST, REG) (be32toh((ST)->REG)) argument 434 #define get64(ST, REG) (be64toh(ST.REG)) argument 435 #define getp64(ST, REG) (be64toh((ST)->REG)) argument 437 #define unget32(ST, REG) (get32(ST, REG) & ~((REG##_mask) \ argument 441 #define ungetp32(ST, REG) (getp32(ST, REG) & ~((REG##_mask) \ argument 454 #define putpnn(ST, REG, X) ((ST)->REG = htobe32(ungetp32(ST, REG) \ argument 457 #define put32(ST, REG, X) (ST.REG = htobe32(X)) argument 458 #define putp32(ST, REG, X) ((ST)->REG = htobe32(X)) argument 459 #define put64(ST, REG, X) (ST.REG = htobe64(X)) argument [all …]
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/linux/arch/arm64/kvm/hyp/nvhe/ |
A D | sys_regs.c | 319 #define AARCH32(REG) { SYS_DESC(REG), .access = pvm_access_id_aarch32 } argument 322 #define AARCH64(REG) { SYS_DESC(REG), .access = pvm_access_id_aarch64 } argument 325 #define RAZ_WI(REG) { SYS_DESC(REG), .access = pvm_access_raz_wi } argument 328 #define HOST_HANDLED(REG) { SYS_DESC(REG), .access = NULL } argument
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/linux/drivers/gpu/drm/amd/display/dc/dcn301/ |
A D | dcn301_hubbub.c | 29 #define REG(reg)\ macro 40 #define REG(reg)\ macro
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A D | dcn301_hwseq.c | 35 #define REG(reg)\ macro
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/linux/arch/sparc/net/ |
A D | bpf_jit_comp_32.c | 68 #define SETHI(K, REG) \ argument 70 #define OR_LO(K, REG) \ argument 121 #define emit_clear(REG) \ argument 126 #define emit_set_const(K, REG) \ argument 220 #define emit_load_cpu(REG) \ argument 223 #define emit_load_cpu(REG) emit_clear(REG) argument 258 #define emit_read_y(REG) *prog++ = RD_Y | RD(REG) argument 259 #define emit_write_y(REG) *prog++ = WR_Y | IMMED | RS1(REG) | S13(0) argument
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/linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
A D | dcn201_hubbub.c | 30 #define REG(reg)\ macro 43 #define REG(reg)\ macro
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A D | dcn201_opp.c | 30 #define REG(reg) \ macro
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/linux/drivers/net/ethernet/freescale/fs_enet/ |
A D | mii-fec.c | 46 #define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18)) argument 47 #define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff)) argument
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/linux/arch/arm64/kernel/ |
A D | hw_breakpoint.c | 59 #define READ_WB_REG_CASE(OFF, N, REG, VAL) \ argument 64 #define WRITE_WB_REG_CASE(OFF, N, REG, VAL) \ argument 69 #define GEN_READ_WB_REG_CASES(OFF, REG, VAL) \ argument 87 #define GEN_WRITE_WB_REG_CASES(OFF, REG, VAL) \ argument
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/linux/drivers/scsi/ |
A D | sun3x_esp.c | 48 #define dma_read32(REG) \ argument 50 #define dma_write32(VAL, REG) \ argument
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/linux/arch/mips/kvm/ |
A D | trace.h | 143 #define KVM_TRACE_COP0(REG, SEL) ((KVM_TRACE_HWR_COP0 << 8) | \ argument 145 #define KVM_TRACE_HWR(REG, SEL) ((KVM_TRACE_HWR_HWR << 8) | \ argument
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/linux/tools/perf/arch/riscv/util/ |
A D | unwind-libdw.c | 15 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
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/linux/tools/perf/arch/csky/util/ |
A D | unwind-libdw.c | 15 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
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/linux/tools/perf/arch/s390/util/ |
A D | unwind-libdw.c | 15 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
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/linux/tools/perf/arch/arm/util/ |
A D | unwind-libdw.c | 13 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
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/linux/tools/perf/arch/x86/util/ |
A D | unwind-libdw.c | 14 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
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/linux/tools/perf/arch/arm64/util/ |
A D | unwind-libdw.c | 13 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
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/linux/arch/arm64/include/asm/ |
A D | hw_breakpoint.h | 99 #define AARCH64_DBG_READ(N, REG, VAL) do {\ argument 103 #define AARCH64_DBG_WRITE(N, REG, VAL) do {\ argument
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/linux/drivers/gpu/drm/amd/display/dc/dcn21/ |
A D | dcn21_hubbub.c | 31 #define REG(reg)\ macro 42 #define REG(reg)\ macro
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/linux/tools/perf/arch/powerpc/util/ |
A D | unwind-libdw.c | 22 #define REG(r) ({ \ in libdw__arch_set_initial_registers() macro
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
A D | rv1_clk_mgr_clk.c | 47 #define REG(reg_name) \ macro
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/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
A D | dcn20_vmid.c | 31 #define REG(reg)\ macro
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/linux/arch/sparc/kernel/ |
A D | psycho_common.h | 15 #define PSYCHO_CONFIG_ENCODE(BUS, DEVFN, REG) \ argument
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