| /linux/drivers/clk/mediatek/ |
| A D | clk-mt8195-infra_ao.c | 43 #define GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
47 #define GATE_INFRA_AO0(_id, _name, _parent, _shift) \ argument
50 #define GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
54 #define GATE_INFRA_AO1(_id, _name, _parent, _shift) \ argument
57 #define GATE_INFRA_AO2(_id, _name, _parent, _shift) \ argument
60 #define GATE_INFRA_AO3_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
64 #define GATE_INFRA_AO3(_id, _name, _parent, _shift) \ argument
67 #define GATE_INFRA_AO4_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
71 #define GATE_INFRA_AO4(_id, _name, _parent, _shift) \ argument
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| A D | clk-mt8167.c | 657 #define DIV_ADJ(_id, _name, _parent, _reg, _shift, _width) { \ argument
738 #define GATE_TOP0(_id, _name, _parent, _shift) { \ argument
747 #define GATE_TOP0_I(_id, _name, _parent, _shift) { \ argument
756 #define GATE_TOP1(_id, _name, _parent, _shift) { \ argument
765 #define GATE_TOP2(_id, _name, _parent, _shift) { \ argument
774 #define GATE_TOP2_I(_id, _name, _parent, _shift) { \ argument
783 #define GATE_TOP3(_id, _name, _parent, _shift) { \ argument
792 #define GATE_TOP4_I(_id, _name, _parent, _shift) { \ argument
801 #define GATE_TOP5(_id, _name, _parent, _shift) { \ argument
982 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
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| A D | clk-mt8183-ipu_conn.c | 44 #define GATE_IPU_CONN(_id, _name, _parent, _shift) \ argument
48 #define GATE_IPU_CONN_APB(_id, _name, _parent, _shift) \ argument
52 #define GATE_IPU_CONN_AXI_I(_id, _name, _parent, _shift) \ argument
56 #define GATE_IPU_CONN_AXI1_I(_id, _name, _parent, _shift) \ argument
60 #define GATE_IPU_CONN_AXI2_I(_id, _name, _parent, _shift) \ argument
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| A D | clk-mt8516.c | 467 #define DIV_ADJ(_id, _name, _parent, _reg, _shift, _width) { \ argument
527 #define GATE_TOP1(_id, _name, _parent, _shift) { \ argument
536 #define GATE_TOP2(_id, _name, _parent, _shift) { \ argument
545 #define GATE_TOP2_I(_id, _name, _parent, _shift) { \ argument
554 #define GATE_TOP3(_id, _name, _parent, _shift) { \ argument
563 #define GATE_TOP4_I(_id, _name, _parent, _shift) { \ argument
572 #define GATE_TOP5(_id, _name, _parent, _shift) { \ argument
736 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
756 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
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| A D | clk-mt8192.c | 880 #define GATE_APMIXED(_id, _name, _parent, _shift) \ argument
923 #define GATE_INFRA0(_id, _name, _parent, _shift) \ argument
930 #define GATE_INFRA1(_id, _name, _parent, _shift) \ argument
933 #define GATE_INFRA2(_id, _name, _parent, _shift) \ argument
940 #define GATE_INFRA3(_id, _name, _parent, _shift) \ argument
943 #define GATE_INFRA4(_id, _name, _parent, _shift) \ argument
950 #define GATE_INFRA5(_id, _name, _parent, _shift) \ argument
1095 #define GATE_PERI(_id, _name, _parent, _shift) \ argument
1108 #define GATE_TOP(_id, _name, _parent, _shift) \ argument
1120 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
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| A D | clk-mt2701-aud.c | 18 #define GATE_AUDIO0(_id, _name, _parent, _shift) { \ argument
27 #define GATE_AUDIO1(_id, _name, _parent, _shift) { \ argument
36 #define GATE_AUDIO2(_id, _name, _parent, _shift) { \ argument
45 #define GATE_AUDIO3(_id, _name, _parent, _shift) { \ argument
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| A D | clk-mt8195-vdo1.c | 37 #define GATE_VDO1_0(_id, _name, _parent, _shift) \ argument
40 #define GATE_VDO1_1(_id, _name, _parent, _shift) \ argument
43 #define GATE_VDO1_2(_id, _name, _parent, _shift) \ argument
46 #define GATE_VDO1_3(_id, _name, _parent, _shift) \ argument
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| A D | clk-mt8173.c | 622 #define GATE_ICG(_id, _name, _parent, _shift) { \ argument
661 #define GATE_PERI0(_id, _name, _parent, _shift) { \ argument
670 #define GATE_PERI1(_id, _name, _parent, _shift) { \ argument
737 #define GATE_IMG(_id, _name, _parent, _shift) { \ argument
768 #define GATE_VDEC0(_id, _name, _parent, _shift) { \ argument
777 #define GATE_VDEC1(_id, _name, _parent, _shift) { \ argument
791 #define GATE_VENC(_id, _name, _parent, _shift) { \ argument
807 #define GATE_VENCLT(_id, _name, _parent, _shift) { \ argument
923 #define APMIXED_USB(_id, _name, _parent, _reg_ofs) { \ argument
938 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
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| A D | clk-mt7622-aud.c | 19 #define GATE_AUDIO0(_id, _name, _parent, _shift) { \ argument
28 #define GATE_AUDIO1(_id, _name, _parent, _shift) { \ argument
37 #define GATE_AUDIO2(_id, _name, _parent, _shift) { \ argument
46 #define GATE_AUDIO3(_id, _name, _parent, _shift) { \ argument
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| A D | clk-mt7622.c | 24 #define PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,\ argument
45 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
52 #define GATE_APMIXED(_id, _name, _parent, _shift) { \ argument
61 #define GATE_INFRA(_id, _name, _parent, _shift) { \ argument
70 #define GATE_TOP0(_id, _name, _parent, _shift) { \ argument
79 #define GATE_TOP1(_id, _name, _parent, _shift) { \ argument
88 #define GATE_PERI0(_id, _name, _parent, _shift) { \ argument
97 #define GATE_PERI1(_id, _name, _parent, _shift) { \ argument
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| A D | clk-mt8183.c | 756 #define GATE_TOP(_id, _name, _parent, _shift) \ argument
790 #define GATE_INFRA0(_id, _name, _parent, _shift) \ argument
794 #define GATE_INFRA1(_id, _name, _parent, _shift) \ argument
798 #define GATE_INFRA2(_id, _name, _parent, _shift) \ argument
802 #define GATE_INFRA3(_id, _name, _parent, _shift) \ argument
1013 #define GATE_PERI(_id, _name, _parent, _shift) \ argument
1027 #define GATE_APMIXED_FLAGS(_id, _name, _parent, _shift, _flags) \ argument
1031 #define GATE_APMIXED(_id, _name, _parent, _shift) \ argument
1067 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1094 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
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| A D | clk-mt6765.c | 485 #define GATE_TOP0(_id, _name, _parent, _shift) { \ argument
494 #define GATE_TOP1(_id, _name, _parent, _shift) { \ argument
503 #define GATE_TOP2(_id, _name, _parent, _shift) { \ argument
561 #define GATE_IFR2(_id, _name, _parent, _shift) { \ argument
570 #define GATE_IFR3(_id, _name, _parent, _shift) { \ argument
579 #define GATE_IFR4(_id, _name, _parent, _shift) { \ argument
588 #define GATE_IFR5(_id, _name, _parent, _shift) { \ argument
676 #define GATE_APMIXED(_id, _name, _parent, _shift) { \ argument
716 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
740 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
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| A D | clk-mt8195-vpp0.c | 31 #define GATE_VPP0_0(_id, _name, _parent, _shift) \ argument
34 #define GATE_VPP0_1(_id, _name, _parent, _shift) \ argument
37 #define GATE_VPP0_2(_id, _name, _parent, _shift) \ argument
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| A D | clk-mt6797.c | 422 #define GATE_ICG0(_id, _name, _parent, _shift) { \ argument
431 #define GATE_ICG1(_id, _name, _parent, _shift) \ argument
434 #define GATE_ICG1_FLAGS(_id, _name, _parent, _shift, _flags) { \ argument
444 #define GATE_ICG2(_id, _name, _parent, _shift) \ argument
447 #define GATE_ICG2_FLAGS(_id, _name, _parent, _shift, _flags) { \ argument
609 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
629 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
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| A D | clk-mt8192-vdec.c | 33 #define GATE_VDEC0(_id, _name, _parent, _shift) \ argument
36 #define GATE_VDEC1(_id, _name, _parent, _shift) \ argument
39 #define GATE_VDEC2(_id, _name, _parent, _shift) \ argument
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| A D | clk-mt2712-mm.c | 33 #define GATE_MM0(_id, _name, _parent, _shift) { \ argument
42 #define GATE_MM1(_id, _name, _parent, _shift) { \ argument
51 #define GATE_MM2(_id, _name, _parent, _shift) { \ argument
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| A D | clk-mt8192-mm.c | 32 #define GATE_MM0(_id, _name, _parent, _shift) \ argument
35 #define GATE_MM1(_id, _name, _parent, _shift) \ argument
38 #define GATE_MM2(_id, _name, _parent, _shift) \ argument
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| A D | clk-mt8195-wpe.c | 31 #define GATE_WPE(_id, _name, _parent, _shift) \ argument
34 #define GATE_WPE_VPP0(_id, _name, _parent, _shift) \ argument
37 #define GATE_WPE_VPP1(_id, _name, _parent, _shift) \ argument
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| /linux/sound/soc/mediatek/mt8195/ |
| A D | mt8195-audsys-clk.c | 28 #define GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, _flags, _cgflags) {\ argument
38 #define GATE_AFE(_id, _name, _parent, _reg, _bit) \ argument
42 #define GATE_AUD0(_id, _name, _parent, _bit) \ argument
45 #define GATE_AUD1(_id, _name, _parent, _bit) \ argument
48 #define GATE_AUD3(_id, _name, _parent, _bit) \ argument
51 #define GATE_AUD4(_id, _name, _parent, _bit) \ argument
54 #define GATE_AUD5(_id, _name, _parent, _bit) \ argument
57 #define GATE_AUD6(_id, _name, _parent, _bit) \ argument
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| /linux/arch/powerpc/include/asm/ |
| A D | perf_event_server.h | 170 #define EVENT_VAR(_id, _suffix) event_attr_##_id##_suffix argument
171 #define EVENT_PTR(_id, _suffix) &EVENT_VAR(_id, _suffix).attr.attr argument
173 #define EVENT_ATTR(_name, _id, _suffix) \ argument
177 #define GENERIC_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _g) argument
178 #define GENERIC_EVENT_PTR(_id) EVENT_PTR(_id, _g) argument
180 #define CACHE_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _c) argument
181 #define CACHE_EVENT_PTR(_id) EVENT_PTR(_id, _c) argument
183 #define POWER_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _p) argument
184 #define POWER_EVENT_PTR(_id) EVENT_PTR(_id, _p) argument
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| /linux/drivers/clk/renesas/ |
| A D | rcar-gen3-cpg.h | 35 #define DEF_GEN3_SD(_name, _id, _parent, _offset) \ argument
38 #define DEF_GEN3_MDSEL(_name, _id, _md, _parent0, _div0, _parent1, _div1) \ argument
43 #define DEF_GEN3_PE(_name, _id, _parent_sscg, _div_sscg, _parent_clean, \ argument
48 #define DEF_GEN3_OSC(_name, _id, _parent, _div) \ argument
51 #define DEF_GEN3_RCKSEL(_name, _id, _parent0, _div0, _parent1, _div1) \ argument
55 #define DEF_GEN3_Z(_name, _id, _type, _parent, _div, _offset) \ argument
58 #define DEF_FIXED_RPCSRC_E3(_name, _id, _parent0, _parent1) \ argument
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| A D | rzg2l-cpg.h | 85 #define DEF_TYPE(_name, _id, _type...) \ argument
87 #define DEF_BASE(_name, _id, _type, _parent...) \ argument
89 #define DEF_SAMPLL(_name, _id, _parent, _conf) \ argument
91 #define DEF_INPUT(_name, _id) \ argument
93 #define DEF_FIXED(_name, _id, _parent, _mult, _div) \ argument
95 #define DEF_DIV(_name, _id, _parent, _conf, _dtable, _flag) \ argument
103 #define DEF_SD_MUX(_name, _id, _conf, _parent_names, _num_parents) \ argument
126 #define DEF_MOD_BASE(_name, _id, _parent, _off, _bit, _is_coupled) \ argument
136 #define DEF_MOD(_name, _id, _parent, _off, _bit) \ argument
139 #define DEF_COUPLED(_name, _id, _parent, _off, _bit) \ argument
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| A D | renesas-cpg-mssr.h | 44 #define DEF_TYPE(_name, _id, _type...) \ argument
46 #define DEF_BASE(_name, _id, _type, _parent...) \ argument
49 #define DEF_INPUT(_name, _id) \ argument
51 #define DEF_FIXED(_name, _id, _parent, _div, _mult) \ argument
53 #define DEF_DIV6P1(_name, _id, _parent, _offset) \ argument
55 #define DEF_DIV6_RO(_name, _id, _parent, _offset, _div) \ argument
57 #define DEF_RATE(_name, _id, _rate) \ argument
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| /linux/drivers/clk/samsung/ |
| A D | clk.h | 42 #define ALIAS(_id, dname, a) \ argument
67 #define FRATE(_id, cname, pname, f, frate) \ argument
94 #define FFACTOR(_id, cname, pname, m, d, f) \ argument
128 #define __MUX(_id, cname, pnames, o, s, w, f, mf) \ argument
141 #define MUX(_id, cname, pnames, o, s, w) \ argument
144 #define MUX_F(_id, cname, pnames, o, s, w, f, mf) \ argument
182 #define DIV(_id, cname, pname, o, s, w) \ argument
185 #define DIV_F(_id, cname, pname, o, s, w, f, df) \ argument
188 #define DIV_T(_id, cname, pname, o, s, w, t) \ argument
211 #define __GATE(_id, cname, pname, o, b, f, gf) \ argument
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| /linux/include/rdma/ |
| A D | uverbs_std_types.h | 19 #define _uobj_check_id(_id) ((_id) * typecheck(u32, _id)) argument
24 #define uobj_get_read(_type, _id, _attrs) \ argument
40 #define uobj_get_obj_read(_object, _type, _id, _attrs) \ argument
44 #define uobj_get_write(_type, _id, _attrs) \ argument
51 #define uobj_perform_destroy(_type, _id, _attrs) \ argument
58 #define uobj_get_destroy(_type, _id, _attrs) \ argument
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