/u-boot/arch/mips/mach-jz47xx/include/mach/ |
A D | jz4780.h | 36 #define GPIO_PXPIN(n) (0x00 + (n) * 0x100) argument 37 #define GPIO_PXINT(n) (0x10 + (n) * 0x100) argument 38 #define GPIO_PXINTS(n) (0x14 + (n) * 0x100) argument 39 #define GPIO_PXINTC(n) (0x18 + (n) * 0x100) argument 40 #define GPIO_PXMASK(n) (0x20 + (n) * 0x100) argument 43 #define GPIO_PXPAT1(n) (0x30 + (n) * 0x100) argument 49 #define GPIO_PXFLG(n) (0x50 + (n) * 0x100) argument 51 #define GPIO_PXOEN(n) (0x60 + (n) * 0x100) argument 54 #define GPIO_PXPEN(n) (0x70 + (n) * 0x100) argument 57 #define GPIO_PXDS(n) (0x80 + (n) * 0x100) argument [all …]
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/u-boot/include/linux/ |
A D | log2.h | 27 int __ilog2_u32(u32 n) in __ilog2_u32() 35 int __ilog2_u64(u64 n) in __ilog2_u64() 50 bool is_power_of_2(unsigned long n) in is_power_of_2() 60 unsigned long __roundup_pow_of_two(unsigned long n) in __roundup_pow_of_two() 70 unsigned long __rounddown_pow_of_two(unsigned long n) in __rounddown_pow_of_two() 85 #define ilog2(n) \ argument 165 #define roundup_pow_of_two(n) \ argument 182 #define rounddown_pow_of_two(n) \ argument 190 int __order_base_2(unsigned long n) in __order_base_2() 208 #define order_base_2(n) \ argument
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A D | ioport.h | 139 #define request_region(start,n,name) __request_region(&ioport_resource, (start), (n), (name), 0) argument 141 #define request_mem_region(start,n,name) __request_region(&iomem_resource, (start), (n), (name), 0) argument 142 #define request_mem_region_exclusive(start,n,name) \ argument 152 #define release_region(start,n) __release_region(&ioport_resource, (start), (n)) argument 153 #define check_mem_region(start,n) __check_region(&iomem_resource, (start), (n)) argument 154 #define release_mem_region(start,n) __release_region(&iomem_resource, (start), (n)) argument 161 resource_size_t n) in check_region() 168 #define devm_request_region(dev,start,n,name) \ argument 170 #define devm_request_mem_region(dev,start,n,name) \ argument 177 #define devm_release_region(dev, start, n) \ argument [all …]
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A D | build_bug.h | 7 #define __BUILD_BUG_ON_NOT_POWER_OF_2(n) (0) argument 8 #define BUILD_BUG_ON_NOT_POWER_OF_2(n) (0) argument 18 #define __BUILD_BUG_ON_NOT_POWER_OF_2(n) \ argument 20 #define BUILD_BUG_ON_NOT_POWER_OF_2(n) \ argument
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/u-boot/arch/arm/include/asm/arch-sunxi/ |
A D | p2wi.h | 24 #define __P2WI_CC_CLK(n) (((n) & 0xff) << 0) argument 26 #define __P2WI_CC_CLK_DIV(n) (((n) >> 1) - 1) argument 27 #define P2WI_CC_CLK_DIV(n) \ argument 29 #define P2WI_CC_SDA_OUT_DELAY(n) (((n) & 0x7) << 8) argument 88 #define P2WI_DATA_BYTE_1(n) (((n) & 0xff) << 0) argument 90 #define P2WI_DATA_BYTE_2(n) (((n) & 0xff) << 8) argument 92 #define P2WI_DATA_BYTE_3(n) (((n) & 0xff) << 16) argument 94 #define P2WI_DATA_BYTE_4(n) (((n) & 0xff) << 24) argument 96 #define P2WI_DATA_BYTE_5(n) (((n) & 0xff) << 0) argument 98 #define P2WI_DATA_BYTE_6(n) (((n) & 0xff) << 8) argument [all …]
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A D | prcm_sun6i.h | 15 #define __PRCM_CPUS_CFG_PRE(n) (((n) & 0x3) << 4) argument 18 #define PRCM_CPUS_CFG_PRE_DIV(n) \ argument 22 #define __PRCM_CPUS_CFG_POST_DIV(n) ((n) - 1) argument 23 #define PRCM_CPUS_CFG_POST_DIV(n) \ argument 43 #define PRCM_APB0_RATIO_DIV(n) \ argument 86 #define PRCM_PLL_CTRL_INT_PLL_IN_SEL(n) \ argument 113 #define PRCM_PLL_CTRL_LDO_OUT_L(n) \ argument 115 #define PRCM_PLL_CTRL_LDO_OUT_H(n) \ argument 117 #define PRCM_PLL_CTRL_LDO_OUT_LV(n) \ argument 119 #define PRCM_PLL_CTRL_LDO_OUT_HV(n) \ argument [all …]
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A D | dram_sun4i.h | 107 #define DRAM_DCR_IO_WIDTH(n) (((n) & 0x3) << 1) argument 119 #define DRAM_DCR_BUS_WIDTH(n) (((n) & 0x7) << 6) argument 124 #define DRAM_DCR_RANK_SEL(n) (((n) & 0x3) << 10) argument 127 #define DRAM_DCR_MODE(n) (((n) & 0x3) << 13) argument 136 #define DRAM_DRR_TRFC(n) ((n) & 0xff) argument 137 #define DRAM_DRR_TREFI(n) (((n) & 0xffff) << 8) argument 140 #define DRAM_MCR_MODE_NORM(n) (((n) & 0x3) << 0) argument 142 #define DRAM_MCR_MODE_DQ_OUT(n) (((n) & 0x3) << 2) argument 152 #define DRAM_MCR_MODE_EN(n) (((n) & 0x3) << 13) argument 159 #define DRAM_ZQCR0_IMP_DIV(n) (((n) & 0xff) << 20) argument [all …]
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A D | lcdc.h | 78 #define SUNXI_LCDC_TCON0_CTRL_CLK_DELAY(n) (((n) & 0x1f) << 4) argument 80 #define SUNXI_LCDC_TCON0_DCLK_DIV(n) ((n) << 0) argument 82 #define SUNXI_LCDC_TCON0_TIMING_H_BP(n) (((n) - 1) << 0) argument 83 #define SUNXI_LCDC_TCON0_TIMING_H_TOTAL(n) (((n) - 1) << 16) argument 84 #define SUNXI_LCDC_TCON0_TIMING_V_BP(n) (((n) - 1) << 0) argument 85 #define SUNXI_LCDC_TCON0_TIMING_V_TOTAL(n) (((n) * 2) << 16) argument 91 #define SUNXI_LCDC_TCON0_LVDS_INTF_BITWIDTH(n) ((n) << 26) argument 97 #define SUNXI_LCDC_TCON1_TIMING_H_BP(n) (((n) - 1) << 0) argument 98 #define SUNXI_LCDC_TCON1_TIMING_H_TOTAL(n) (((n) - 1) << 16) argument 99 #define SUNXI_LCDC_TCON1_TIMING_V_BP(n) (((n) - 1) << 0) argument [all …]
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/u-boot/arch/arm/include/asm/arch-lpc32xx/ |
A D | timer.h | 28 #define TIMER_IR_CR(n) (1 << ((n) + 4)) argument 29 #define TIMER_IR_MR(n) (1 << (n)) argument 37 #define TIMER_MCR_STOP(n) (1 << (3 * (n) + 2)) argument 38 #define TIMER_MCR_RESET(n) (1 << (3 * (n) + 1)) argument 39 #define TIMER_MCR_INTERRUPT(n) (1 << (3 * (n))) argument 42 #define TIMER_CCR_INTERRUPT(n) (1 << (3 * (n) + 2)) argument 43 #define TIMER_CCR_FALLING_EDGE(n) (1 << (3 * (n) + 1)) argument 44 #define TIMER_CCR_RISING_EDGE(n) (1 << (3 * (n))) argument 48 #define TIMER_EMR_EMC_SET(n) (0x2 << (2 * (n) + 4)) argument 51 #define TIMER_EMR_EM(n) (1 << (n)) argument [all …]
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A D | uart.h | 55 #define HSUART_CTRL_HSU_OFFSET(n) ((n) << 9) argument 90 #define UART_CLKMODE_STATX(n) (1 << ((n) + 16)) argument 92 #define UART_CLKMODE_MASK(n) (0x3 << (2 * (n) - 2)) argument 93 #define UART_CLKMODE_AUTO(n) (0x2 << (2 * (n) - 2)) argument 94 #define UART_CLKMODE_ON(n) (0x1 << (2 * (n) - 2)) argument 95 #define UART_CLKMODE_OFF(n) (0x0 << (2 * (n) - 2)) argument 98 #define UART_LOOPBACK(n) (1 << ((n) - 1)) argument
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/u-boot/arch/arm/include/asm/arch-rockchip/ |
A D | sdram_common.h | 71 #define SYS_REG_ENC_ROW_3_4(n, ch) ((n) << (30 + (ch))) argument 72 #define SYS_REG_DEC_ROW_3_4(n, ch) (((n) >> (30 + (ch))) & 0x1) argument 74 #define SYS_REG_ENC_DDRTYPE(n) ((n) << 13) argument 75 #define SYS_REG_DEC_DDRTYPE(n) (((n) >> 13) & 0x7) argument 76 #define SYS_REG_ENC_NUM_CH(n) (((n) - 1) << 12) argument 77 #define SYS_REG_DEC_NUM_CH(n) (1 + (((n) >> 12) & 0x1)) argument 82 #define SYS_REG_ENC_BK(n, ch) (((n) == 3 ? 0 : 1) << \ argument 90 #define SYS_REG_ENC_VERSION(n) ((n) << 28) argument 91 #define SYS_REG_DEC_VERSION(n) (((n) >> 28) & 0xf) argument 92 #define SYS_REG_ENC_CS0_ROW(n, os_reg2, os_reg3, ch) do { \ argument [all …]
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A D | sdram_px30.h | 19 #define PMUGRF_OS_REG(n) (PMUGRF_OS_REG0 + (n) * 4) argument 22 #define DDR_GRF_CON(n) (0 + (n) * 4) argument 42 #define PB(n) ((0x1 << (15 + 16)) | ((n) << 15)) argument 44 #define FBDIV(n) ((0xFFF << 16) | (n)) argument 47 #define RSTMODE(n) ((0x1 << (15 + 16)) | ((n) << 15)) argument 48 #define RST(n) ((0x1 << (14 + 16)) | ((n) << 14)) argument 49 #define PD(n) ((0x1 << (13 + 16)) | ((n) << 13)) argument 50 #define DSMPD(n) ((0x1 << (12 + 16)) | ((n) << 12)) argument 51 #define LOCK(n) (((n) >> 10) & 0x1) argument 52 #define POSTDIV2(n) ((0x7 << (6 + 16)) | ((n) << 6)) argument [all …]
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A D | sdram_rk3328.h | 34 #define DDR_GRF_CON(n) (0 + (n) * 4) argument 36 #define DDR_GRF_STATUS(n) (DDR_GRF_STATUS_BASE + (n) * 4) argument 62 #define PB(n) ((0x1 << (15 + 16)) | ((n) << 15)) argument 63 #define POSTDIV1(n) ((0x7 << (12 + 16)) | ((n) << 12)) argument 64 #define FBDIV(n) ((0xFFF << 16) | (n)) argument 67 #define RSTMODE(n) ((0x1 << (15 + 16)) | ((n) << 15)) argument 68 #define RST(n) ((0x1 << (14 + 16)) | ((n) << 14)) argument 69 #define PD(n) ((0x1 << (13 + 16)) | ((n) << 13)) argument 71 #define LOCK(n) (((n) >> 10) & 0x1) argument 72 #define POSTDIV2(n) ((0x7 << (6 + 16)) | ((n) << 6)) argument [all …]
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/u-boot/arch/arm/mach-snapdragon/include/mach/ |
A D | sysmap-apq8016.h | 18 #define SDCC_BCR(n) ((n * 0x1000) + 0x41000) argument 19 #define SDCC_CMD_RCGR(n) ((n * 0x1000) + 0x41004) argument 20 #define SDCC_CFG_RCGR(n) ((n * 0x1000) + 0x41008) argument 21 #define SDCC_M(n) ((n * 0x1000) + 0x4100C) argument 22 #define SDCC_N(n) ((n * 0x1000) + 0x41010) argument 23 #define SDCC_D(n) ((n * 0x1000) + 0x41014) argument 24 #define SDCC_APPS_CBCR(n) ((n * 0x1000) + 0x41018) argument 25 #define SDCC_AHB_CBCR(n) ((n * 0x1000) + 0x4101C) argument
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/u-boot/drivers/usb/dwc3/ |
A D | gadget.h | 30 #define DWC3_DEPCFG_INT_NUM(n) ((n) << 0) argument 36 #define DWC3_DEPCFG_BINTERVAL_M1(n) ((n) << 16) argument 38 #define DWC3_DEPCFG_EP_NUMBER(n) ((n) << 25) argument 43 #define DWC3_DEPCFG_EP_TYPE(n) ((n) << 1) argument 44 #define DWC3_DEPCFG_MAX_PACKET_SIZE(n) ((n) << 3) argument 45 #define DWC3_DEPCFG_FIFO_NUMBER(n) ((n) << 17) argument 46 #define DWC3_DEPCFG_BURST_SIZE(n) ((n) << 22) argument 47 #define DWC3_DEPCFG_DATA_SEQ_NUM(n) ((n) << 26) argument 56 #define DWC3_DEPXFERCFG_NUM_XFER_RES(n) ((n) & 0xffff) argument
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/u-boot/fs/btrfs/ |
A D | conv-funcs.h | 28 # define DEFINE_CONV(n,...) \ argument 38 # define DEFINE_CONV_ALT(n,a,...) \ argument 59 # define DEFINE_CONV_FOR_STRUCT(n) \ argument 103 # define DEFINE_CONV_ONE(t,n,m,...) \ argument 110 # define DEFINE_CONV(n,...) \ argument 114 # define DEFINE_CONV_ALT(n,a,...) \ argument
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/u-boot/drivers/phy/rockchip/ |
A D | phy-rockchip-typec.c | 118 #define XCVR_PSM_RCTRL(n) ((0x4001 | ((n) << 9)) << 2) argument 146 #define TX_PSC_A0(n) ((0x4100 | ((n) << 9)) << 2) argument 147 #define TX_PSC_A1(n) ((0x4101 | ((n) << 9)) << 2) argument 148 #define TX_PSC_A2(n) ((0x4102 | ((n) << 9)) << 2) argument 149 #define TX_PSC_A3(n) ((0x4103 | ((n) << 9)) << 2) argument 217 #define RX_PSC_A0(n) ((0x8000 | ((n) << 9)) << 2) argument 218 #define RX_PSC_A1(n) ((0x8001 | ((n) << 9)) << 2) argument 219 #define RX_PSC_A2(n) ((0x8002 | ((n) << 9)) << 2) argument 220 #define RX_PSC_A3(n) ((0x8003 | ((n) << 9)) << 2) argument 221 #define RX_PSC_CAL(n) ((0x8006 | ((n) << 9)) << 2) argument [all …]
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/u-boot/include/ |
A D | dwc3-sti-glue.h | 22 #define SEL_OVERRIDE_VBUSVALID(n) ((n) << 0) argument 23 #define SEL_OVERRIDE_POWERPRESENT(n) ((n) << 4) argument 24 #define SEL_OVERRIDE_BVALID(n) ((n) << 8) argument 33 #define USB3_FORCE_OPMODE(n) ((n) << 5) argument
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A D | div64.h | 28 # define do_div(n,base) ({ \ argument 54 #define __div64_const32(n, ___b) \ argument 160 static inline u64 __arch_xprod_64(const u64 m, u64 n, bool bias) in __arch_xprod_64() 204 # define do_div(n,base) ({ \ argument
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/u-boot/drivers/gpio/ |
A D | mxs_gpio.c | 21 #define PINCTRL_DOUT(n) (0x0500 + ((n) * 0x10)) argument 22 #define PINCTRL_DIN(n) (0x0600 + ((n) * 0x10)) argument 23 #define PINCTRL_DOE(n) (0x0700 + ((n) * 0x10)) argument 24 #define PINCTRL_PIN2IRQ(n) (0x0800 + ((n) * 0x10)) argument 25 #define PINCTRL_IRQEN(n) (0x0900 + ((n) * 0x10)) argument 26 #define PINCTRL_IRQSTAT(n) (0x0c00 + ((n) * 0x10)) argument 29 #define PINCTRL_DOUT(n) (0x0700 + ((n) * 0x10)) argument 30 #define PINCTRL_DIN(n) (0x0900 + ((n) * 0x10)) argument 31 #define PINCTRL_DOE(n) (0x0b00 + ((n) * 0x10)) argument 32 #define PINCTRL_PIN2IRQ(n) (0x1000 + ((n) * 0x10)) argument [all …]
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/u-boot/lib/efi_loader/ |
A D | efi_freestanding.c | 23 int memcmp(const void *s1, const void *s2, size_t n) in memcmp() 45 void *memmove(void *dest, const void *src, size_t n) in memmove() 70 void *memcpy(void *dest, const void *src, size_t n) in memcpy() 83 void *memset(void *s, int c, size_t n) in memset()
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/u-boot/arch/arm/include/asm/ti-common/ |
A D | davinci_nand.h | 77 #define DAVINCI_NANDFCR_NAND_ENABLE(n) (1 << ((n) - 2)) argument 79 #define DAVINCI_NANDFCR_4BIT_ECC_SEL(n) (((n) - 2) << 4) argument 80 #define DAVINCI_NANDFCR_1BIT_ECC_START(n) (1 << (8 + ((n) - 2))) argument 88 #define DAVINCI_ABCR_WSETUP(n) (n << 26) argument 89 #define DAVINCI_ABCR_WSTROBE(n) (n << 20) argument 90 #define DAVINCI_ABCR_WHOLD(n) (n << 17) argument 91 #define DAVINCI_ABCR_RSETUP(n) (n << 13) argument 92 #define DAVINCI_ABCR_RSTROBE(n) (n << 7) argument 93 #define DAVINCI_ABCR_RHOLD(n) (n << 4) argument 94 #define DAVINCI_ABCR_TA(n) (n << 2) argument
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/u-boot/include/power/ |
A D | as3722.h | 15 #define AS3722_SD_VOLTAGE(n) (0x00 + (n)) argument 16 #define AS3722_LDO_VOLTAGE(n) (0x10 + (n)) argument 23 #define AS3722_GPIO_CONTROL(n) (0x08 + (n)) argument
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/u-boot/lib/libavb/ |
A D | avb_sysdeps_posix.c | 13 int avb_memcmp(const void* src1, const void* src2, size_t n) { in avb_memcmp() 17 void* avb_memcpy(void* dest, const void* src, size_t n) { in avb_memcpy() 21 void* avb_memset(void* dest, const int c, size_t n) { in avb_memset() 29 int avb_strncmp(const char* s1, const char* s2, size_t n) { in avb_strncmp()
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/u-boot/arch/nds32/include/asm/ |
A D | string.h | 41 #define memset(p, v, n) \ argument 52 #define memzero(p, n) ({ if ((n) != 0) __memzero((p), (n)); (p); }) argument
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