Searched refs:AR7_REGS_BASE (Results 1 – 2 of 2) sorted by relevance
18 #define AR7_REGS_BASE 0x08610000 macro20 #define AR7_REGS_MAC0 (AR7_REGS_BASE + 0x0000)21 #define AR7_REGS_GPIO (AR7_REGS_BASE + 0x0900)23 #define AR7_REGS_POWER (AR7_REGS_BASE + 0x0a00)26 #define AR7_REGS_UART0 (AR7_REGS_BASE + 0x0e00)27 #define AR7_REGS_USB (AR7_REGS_BASE + 0x1200)31 #define AR7_REGS_DCL (AR7_REGS_BASE + 0x1a00)33 #define AR7_REGS_MDIO (AR7_REGS_BASE + 0x1e00)34 #define AR7_REGS_IRQ (AR7_REGS_BASE + 0x2400)37 #define AR7_REGS_WDT (AR7_REGS_BASE + 0x1f00)[all …]
84 io_base = (unsigned long)ioremap(AR7_REGS_BASE, 0x10000); in plat_mem_setup()
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