Home
last modified time | relevance | path

Searched refs:CLK_MOUT_APLL (Results 1 – 8 of 8) sorted by relevance

/linux/include/dt-bindings/clock/
A Dexynos5250.h175 #define CLK_MOUT_APLL 1028 macro
A Dexynos4.h32 #define CLK_MOUT_APLL 20 macro
A Dexynos5420.h234 #define CLK_MOUT_APLL 663 macro
A Dexynos3250.h77 #define CLK_MOUT_APLL 59 macro
/linux/drivers/clk/samsung/
A Dclk-exynos4.c420 MUX_F(CLK_MOUT_APLL, "mout_apll", mout_apll_p, SRC_CPU, 0, 1,
1308 hws[CLK_MOUT_APLL], hws[CLK_SCLK_MPLL], 0x14200, in exynos4_clk_init()
1323 hws[CLK_MOUT_APLL], hws[CLK_MOUT_MPLL_USER_C], 0x14200, in exynos4_clk_init()
A Dclk-exynos5250.c256 MUX_F(CLK_MOUT_APLL, "mout_apll", mout_apll_p, SRC_CPU, 0, 1,
826 hws[CLK_MOUT_APLL], hws[CLK_MOUT_MPLL], 0x200, in exynos5250_clk_init()
A Dclk-exynos5420.c603 MUX_F(CLK_MOUT_APLL, "mout_apll", mout_apll_p, SRC_CPU, 0, 1,
1629 hws[CLK_MOUT_APLL], hws[CLK_MOUT_MSPLL_CPU], 0x200, in exynos5x_clk_init()
1633 hws[CLK_MOUT_APLL], hws[CLK_MOUT_MSPLL_CPU], 0x200, in exynos5x_clk_init()
A Dclk-exynos3250.c322 MUX_F(CLK_MOUT_APLL, "mout_apll", mout_apll_p, SRC_CPU, 0, 1,
819 hws[CLK_MOUT_APLL], hws[CLK_MOUT_MPLL_USER_C], in exynos3250_cmu_init()

Completed in 20 milliseconds