Searched refs:CLK_TOP_APLL12_DIV1 (Results 1 – 18 of 18) sorted by relevance
/linux/sound/soc/mediatek/mt8183/ |
A D | mt8183-afe-clk.c | 45 CLK_TOP_APLL12_DIV1, enumerator 84 [CLK_TOP_APLL12_DIV1] = "top_apll12_div1", 518 .div_clk_id = CLK_TOP_APLL12_DIV1,
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/linux/include/dt-bindings/clock/ |
A D | mt8516-clk.h | 152 #define CLK_TOP_APLL12_DIV1 120 macro
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A D | mt6765-clk.h | 114 #define CLK_TOP_APLL12_DIV1 79 macro
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A D | mt6779-clk.h | 139 #define CLK_TOP_APLL12_DIV1 129 macro
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A D | mt8183-clk.h | 159 #define CLK_TOP_APLL12_DIV1 123 macro
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A D | mt8192-clk.h | 155 #define CLK_TOP_APLL12_DIV1 143 macro
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A D | mt8195-clk.h | 231 #define CLK_TOP_APLL12_DIV1 219 macro
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/linux/sound/soc/mediatek/mt8192/ |
A D | mt8192-afe-clk.h | 207 CLK_TOP_APLL12_DIV1, enumerator
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A D | mt8192-afe-clk.c | 50 [CLK_TOP_APLL12_DIV1] = "top_apll12_div1", 439 .div_clk_id = CLK_TOP_APLL12_DIV1,
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/linux/Documentation/devicetree/bindings/sound/ |
A D | mt8195-afe-pcm.yaml | 146 <&topckgen 234>, //CLK_TOP_APLL12_DIV1
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/linux/drivers/clk/mediatek/ |
A D | clk-mt8516.c | 667 GATE_TOP5(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll12_ck_div1", 1),
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A D | clk-mt8195-topckgen.c | 1159 DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "top_i2si2_mck", 0x0320, 1, 0x0328, 8, 8),
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A D | clk-mt8167.c | 913 GATE_TOP5(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll12_ck_div1", 1),
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A D | clk-mt6779.c | 830 DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "i2s1_m_ck_sel",
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A D | clk-mt8183.c | 738 DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll_i2s1_sel",
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A D | clk-mt8192.c | 862 DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll_i2s1_m_sel", 0x320, 1, 0x328, 8, 8),
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A D | clk-mt6765.c | 532 GATE_TOP2(CLK_TOP_APLL12_DIV1, "apll12_div1", "aud_1_ck", 3),
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/linux/arch/arm64/boot/dts/mediatek/ |
A D | mt8183.dtsi | 1164 <&topckgen CLK_TOP_APLL12_DIV1>,
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