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Searched refs:CLK_TOP_HDMI_SEL (Results 1 – 5 of 5) sorted by relevance

/linux/include/dt-bindings/clock/
A Dmt8173-clk.h125 #define CLK_TOP_HDMI_SEL 115 macro
A Dmt2701-clk.h108 #define CLK_TOP_HDMI_SEL 97 macro
/linux/drivers/clk/mediatek/
A Dclk-mt2701.c535 MUX_GATE(CLK_TOP_HDMI_SEL, "hdmi_sel", hdmi_parents,
A Dclk-mt8173.c587 MUX_GATE(CLK_TOP_HDMI_SEL, "hdmi_sel", hdmi_parents, 0x00c0, 8, 2, 15),
/linux/arch/arm64/boot/dts/mediatek/
A Dmt8173.dtsi1326 assigned-clocks = <&topckgen CLK_TOP_HDMI_SEL>;

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