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Searched refs:CLK_TOP_MUX_DDRPHYCFG (Results 1 – 2 of 2) sorted by relevance

/linux/include/dt-bindings/clock/
A Dmt6797-clk.h15 #define CLK_TOP_MUX_DDRPHYCFG 5 macro
/linux/drivers/clk/mediatek/
A Dclk-mt6797.c330 MUX_FLAGS(CLK_TOP_MUX_DDRPHYCFG, "ddrphycfg_sel", ddrphycfg_parents,

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