Searched refs:CLK_TOP_MUX_UART (Results 1 – 4 of 4) sorted by relevance

/linux/include/dt-bindings/clock/
A D	mt6797-clk.h	22 #define CLK_TOP_MUX_UART 12 macro
A D	mt8183-clk.h	41 #define CLK_TOP_MUX_UART 5 macro
/linux/drivers/clk/mediatek/
A D	clk-mt6797.c	339 MUX_GATE(CLK_TOP_MUX_UART, "uart_sel", uart_parents, 0x0060, 8, 1, 15),
A D	clk-mt8183.c	570 MUX_GATE_CLR_SET_UPD(CLK_TOP_MUX_UART, "uart_sel",

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