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Searched refs:DEFINE_RES_IO (Results 1 – 10 of 10) sorted by relevance

/linux/arch/m68k/q40/
A Dconfig.c296 DEFINE_RES_IO(PCIDE_BASE1, 8),
297 DEFINE_RES_IO(PCIDE_BASE1 + PCIDE_CTL, 1),
304 DEFINE_RES_IO(PCIDE_BASE2, 8),
305 DEFINE_RES_IO(PCIDE_BASE2 + PCIDE_CTL, 1),
/linux/drivers/mfd/
A Dtqmx86.c61 DEFINE_RES_IO(TQMX86_IOBASE_I2C, TQMX86_IOSIZE_I2C),
65 DEFINE_RES_IO(TQMX86_IOBASE_WATCHDOG, TQMX86_IOSIZE_WATCHDOG),
74 DEFINE_RES_IO(TQMX86_IOBASE_GPIO, TQMX86_IOSIZE_GPIO),
/linux/include/linux/
A Dioport.h166 #define DEFINE_RES_IO(_start, _size) \ macro
/linux/drivers/platform/x86/
A Dbarco-p50-gpio.c408 struct resource res = DEFINE_RES_IO(P50_GPIO_IO_PORT_BASE, P50_PORT_CMD + 1); in p50_module_init()
/linux/arch/arm/mach-davinci/
A Ddm646x.c509 .reg = DEFINE_RES_IO(DAVINCI_TIMER0_BASE, SZ_4K),
A Ddm644x.c569 .reg = DEFINE_RES_IO(DAVINCI_TIMER0_BASE, SZ_4K),
A Ddm355.c628 .reg = DEFINE_RES_IO(DAVINCI_TIMER0_BASE, SZ_4K),
A Dda850.c342 .reg = DEFINE_RES_IO(DA8XX_TIMER64P0_BASE, SZ_4K),
A Ddm365.c669 .reg = DEFINE_RES_IO(DAVINCI_TIMER0_BASE, SZ_128),
A Dda830.c685 .reg = DEFINE_RES_IO(DA8XX_TIMER64P0_BASE, SZ_4K),

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