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Searched refs:DPIO_CH0 (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/i915/gvt/
A Dhandlers.c543 enum dpio_channel ch = DPIO_CH0; in bxt_vgpu_get_dp_bitrate()
551 ch = DPIO_CH0; in bxt_vgpu_get_dp_bitrate()
555 ch = DPIO_CH0; in bxt_vgpu_get_dp_bitrate()
3528 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 0), D_BXT); in init_bxt_mmio_info()
3529 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 1), D_BXT); in init_bxt_mmio_info()
3530 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 2), D_BXT); in init_bxt_mmio_info()
3531 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 3), D_BXT); in init_bxt_mmio_info()
3532 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 6), D_BXT); in init_bxt_mmio_info()
3533 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 8), D_BXT); in init_bxt_mmio_info()
3534 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 9), D_BXT); in init_bxt_mmio_info()
[all …]
/linux/drivers/gpu/drm/i915/display/
A Dintel_dpio_phy.c169 [DPIO_CH0] = { .port = PORT_B },
179 [DPIO_CH0] = { .port = PORT_A },
192 [DPIO_CH0] = { .port = PORT_B },
202 [DPIO_CH0] = { .port = PORT_A },
212 [DPIO_CH0] = { .port = PORT_C },
250 if (port == phy_info->channel[DPIO_CH0].port) { in bxt_port_to_phy_channel()
252 *ch = DPIO_CH0; in bxt_port_to_phy_channel()
267 *ch = DPIO_CH0; in bxt_port_to_phy_channel()
815 if (ch == DPIO_CH0 && pipe == PIPE_B) in chv_phy_pre_pll_enable()
830 if (ch == DPIO_CH0) in chv_phy_pre_pll_enable()
[all …]
A Dintel_display_power.c1548 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 0) | in assert_chv_phy_status()
1549 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 1) | in assert_chv_phy_status()
1556 PHY_STATUS_SPLINE_LDO(DPIO_PHY1, DPIO_CH0, 0) | in assert_chv_phy_status()
1557 PHY_STATUS_SPLINE_LDO(DPIO_PHY1, DPIO_CH0, 1)); in assert_chv_phy_status()
1573 phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH0); in assert_chv_phy_status()
1750 if (ch == DPIO_CH0) in assert_chv_phy_powergate()
1783 if (ch == DPIO_CH0) in assert_chv_phy_powergate()
5912 PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH0); in chv_phy_control_init()
5915 PHY_CH_POWER_DOWN_OVRD(mask, DPIO_PHY0, DPIO_CH0); in chv_phy_control_init()
5944 PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY1, DPIO_CH0); in chv_phy_control_init()
[all …]
A Dintel_display_types.h1727 return DPIO_CH0; in vlv_dig_port_to_channel()
1755 return DPIO_CH0; in vlv_pipe_to_channel()
A Dintel_display.h280 DPIO_CH0, enumerator

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