Searched refs:DPIO_PHY0 (Results 1 – 9 of 9) sorted by relevance
| /linux/drivers/gpu/drm/i915/gvt/ |
| A D | handlers.c | 542 enum dpio_phy phy = DPIO_PHY0; in bxt_vgpu_get_dp_bitrate()
554 phy = DPIO_PHY0; in bxt_vgpu_get_dp_bitrate()
558 phy = DPIO_PHY0; in bxt_vgpu_get_dp_bitrate()
3475 MMIO_DH(BXT_PHY_CTL_FAMILY(DPIO_PHY0), D_BXT, in init_bxt_mmio_info()
3489 MMIO_D(BXT_PORT_CL1CM_DW0(DPIO_PHY0), D_BXT); in init_bxt_mmio_info()
3490 MMIO_D(BXT_PORT_CL1CM_DW9(DPIO_PHY0), D_BXT); in init_bxt_mmio_info()
3491 MMIO_D(BXT_PORT_CL1CM_DW10(DPIO_PHY0), D_BXT); in init_bxt_mmio_info()
3494 MMIO_D(BXT_PORT_CL2CM_DW6(DPIO_PHY0), D_BXT); in init_bxt_mmio_info()
3495 MMIO_D(BXT_PORT_REF_DW3(DPIO_PHY0), D_BXT); in init_bxt_mmio_info()
3496 MMIO_D(BXT_PORT_REF_DW6(DPIO_PHY0), D_BXT); in init_bxt_mmio_info()
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| A D | display.c | 231 vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) &= in emulate_monitor_status_change()
235 vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY0)) &= ~BIT(30); in emulate_monitor_status_change()
294 vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) |= in emulate_monitor_status_change()
296 vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY0)) |= in emulate_monitor_status_change()
324 vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) |= in emulate_monitor_status_change()
326 vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY0)) |= in emulate_monitor_status_change()
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| A D | mmio.c | 260 vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) &= in intel_vgpu_reset_mmio()
264 vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY0)) &= in intel_vgpu_reset_mmio()
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| /linux/drivers/gpu/drm/i915/display/ |
| A D | intel_display_power.c | 1546 if (!dev_priv->chv_phy_assert[DPIO_PHY0]) in assert_chv_phy_status()
1550 PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH1) | in assert_chv_phy_status()
1560 phy_status |= PHY_POWERGOOD(DPIO_PHY0); in assert_chv_phy_status()
1648 phy = DPIO_PHY0; in chv_dpio_cmn_power_well_enable()
1710 phy = DPIO_PHY0; in chv_dpio_cmn_power_well_disable()
3551 .bxt.phy = DPIO_PHY0,
3611 .bxt.phy = DPIO_PHY0,
5912 PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH0); in chv_phy_control_init()
5922 PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH1); in chv_phy_control_init()
5929 dev_priv->chv_phy_assert[DPIO_PHY0] = false; in chv_phy_control_init()
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| A D | intel_dpio_phy.c | 163 [DPIO_PHY0] = {
185 [DPIO_PHY0] = {
266 *phy = DPIO_PHY0; in bxt_port_to_phy_channel()
817 !chv_phy_powergate_ch(dev_priv, DPIO_PHY0, DPIO_CH1, true); in chv_phy_pre_pll_enable()
965 chv_phy_powergate_ch(dev_priv, DPIO_PHY0, DPIO_CH1, false); in chv_phy_release_cl2_override()
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| A D | intel_display.h | 285 DPIO_PHY0, enumerator
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| A D | intel_display_types.h | 1741 return DPIO_PHY0; in vlv_dig_port_to_phy()
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| /linux/drivers/gpu/drm/i915/ |
| A D | vlv_sideband.c | 222 return phy == DPIO_PHY0 ? IOSF_PORT_DPIO_2 : IOSF_PORT_DPIO; in vlv_dpio_phy_iosf_port()
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| A D | i915_reg.h | 3557 #define PHY_POWERGOOD(phy) (((phy) == DPIO_PHY0) ? (1 << 31) : (1 << 30))
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