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Searched refs:FPU_CSR_COND5 (Results 1 – 2 of 2) sorted by relevance

/linux/arch/mips/include/asm/
A Dmipsregs.h1166 #define FPU_CSR_COND5 (_ULCAST_(1) << FPU_CSR_COND5_S) macro
/linux/arch/mips/math-emu/
A Dcp1emu.c66 FPU_CSR_COND5,

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