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Searched refs:GRBM_SOFT_RESET (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/gpu/drm/radeon/
A Dni.c1652 WREG32(GRBM_SOFT_RESET, (SOFT_RESET_CP | in cayman_cp_resume()
1658 RREG32(GRBM_SOFT_RESET); in cayman_cp_resume()
1660 WREG32(GRBM_SOFT_RESET, 0); in cayman_cp_resume()
1661 RREG32(GRBM_SOFT_RESET); in cayman_cp_resume()
1907 tmp = RREG32(GRBM_SOFT_RESET); in cayman_gpu_soft_reset()
1910 WREG32(GRBM_SOFT_RESET, tmp); in cayman_gpu_soft_reset()
1911 tmp = RREG32(GRBM_SOFT_RESET); in cayman_gpu_soft_reset()
1916 WREG32(GRBM_SOFT_RESET, tmp); in cayman_gpu_soft_reset()
1917 tmp = RREG32(GRBM_SOFT_RESET); in cayman_gpu_soft_reset()
A Devergreen.c3072 WREG32(GRBM_SOFT_RESET, (SOFT_RESET_CP | in evergreen_cp_resume()
3078 RREG32(GRBM_SOFT_RESET); in evergreen_cp_resume()
3080 WREG32(GRBM_SOFT_RESET, 0); in evergreen_cp_resume()
3081 RREG32(GRBM_SOFT_RESET); in evergreen_cp_resume()
3974 tmp = RREG32(GRBM_SOFT_RESET); in evergreen_gpu_soft_reset()
3977 WREG32(GRBM_SOFT_RESET, tmp); in evergreen_gpu_soft_reset()
3978 tmp = RREG32(GRBM_SOFT_RESET); in evergreen_gpu_soft_reset()
3983 WREG32(GRBM_SOFT_RESET, tmp); in evergreen_gpu_soft_reset()
3984 tmp = RREG32(GRBM_SOFT_RESET); in evergreen_gpu_soft_reset()
A Drv770.c1115 WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP); in rv770_cp_load_microcode()
1116 RREG32(GRBM_SOFT_RESET); in rv770_cp_load_microcode()
1118 WREG32(GRBM_SOFT_RESET, 0); in rv770_cp_load_microcode()
A Dsi.c3946 tmp = RREG32(GRBM_SOFT_RESET); in si_gpu_soft_reset()
3949 WREG32(GRBM_SOFT_RESET, tmp); in si_gpu_soft_reset()
3950 tmp = RREG32(GRBM_SOFT_RESET); in si_gpu_soft_reset()
3955 WREG32(GRBM_SOFT_RESET, tmp); in si_gpu_soft_reset()
3956 tmp = RREG32(GRBM_SOFT_RESET); in si_gpu_soft_reset()
5804 u32 tmp = RREG32(GRBM_SOFT_RESET); in si_rlc_reset()
5807 WREG32(GRBM_SOFT_RESET, tmp); in si_rlc_reset()
5810 WREG32(GRBM_SOFT_RESET, tmp); in si_rlc_reset()
A Dr600.c2661 WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP); in r600_cp_load_microcode()
2662 RREG32(GRBM_SOFT_RESET); in r600_cp_load_microcode()
2664 WREG32(GRBM_SOFT_RESET, 0); in r600_cp_load_microcode()
2724 WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP); in r600_cp_resume()
2725 RREG32(GRBM_SOFT_RESET); in r600_cp_resume()
2727 WREG32(GRBM_SOFT_RESET, 0); in r600_cp_resume()
A Drv770d.h401 #define GRBM_SOFT_RESET 0x8020 macro
A Dnid.h280 #define GRBM_SOFT_RESET 0x8020 macro
A Dsid.h982 #define GRBM_SOFT_RESET 0x8020 macro
A Dcikd.h1075 #define GRBM_SOFT_RESET 0x8020 macro
A Dcik.c5009 tmp = RREG32(GRBM_SOFT_RESET); in cik_gpu_soft_reset()
5012 WREG32(GRBM_SOFT_RESET, tmp); in cik_gpu_soft_reset()
5013 tmp = RREG32(GRBM_SOFT_RESET); in cik_gpu_soft_reset()
5018 WREG32(GRBM_SOFT_RESET, tmp); in cik_gpu_soft_reset()
5019 tmp = RREG32(GRBM_SOFT_RESET); in cik_gpu_soft_reset()
A Devergreend.h828 #define GRBM_SOFT_RESET 0x8020 macro
A Dr600d.h295 #define GRBM_SOFT_RESET 0x8020 macro
/linux/drivers/gpu/drm/amd/amdgpu/
A Dgfx_v8_0.c4102 WREG32_FIELD(GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); in gfx_v8_0_rlc_reset()
4105 WREG32_FIELD(GRBM_SOFT_RESET, SOFT_RESET_RLC, 0); in gfx_v8_0_rlc_reset()
4986 GRBM_SOFT_RESET, SOFT_RESET_CP, 1); in gfx_v8_0_check_soft_reset()
4988 GRBM_SOFT_RESET, SOFT_RESET_GFX, 1); in gfx_v8_0_check_soft_reset()
4997 GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); in gfx_v8_0_check_soft_reset()
5002 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, in gfx_v8_0_check_soft_reset()
5004 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, in gfx_v8_0_check_soft_reset()
5006 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, in gfx_v8_0_check_soft_reset()
5046 if (REG_GET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, SOFT_RESET_CP) || in gfx_v8_0_pre_soft_reset()
5047 REG_GET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, SOFT_RESET_GFX)) in gfx_v8_0_pre_soft_reset()
[all …]
A Dgfx_v9_0.c3088 WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); in gfx_v9_0_rlc_reset()
3090 WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 0); in gfx_v9_0_rlc_reset()
4123 GRBM_SOFT_RESET, SOFT_RESET_CP, 1); in gfx_v9_0_soft_reset()
4125 GRBM_SOFT_RESET, SOFT_RESET_GFX, 1); in gfx_v9_0_soft_reset()
4130 GRBM_SOFT_RESET, SOFT_RESET_CP, 1); in gfx_v9_0_soft_reset()
4137 GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); in gfx_v9_0_soft_reset()
A Dsid.h980 #define GRBM_SOFT_RESET 0x2008 macro
A Dgfx_v10_0.c5333 WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); in gfx_v10_0_rlc_reset()
5335 WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 0); in gfx_v10_0_rlc_reset()
7636 GRBM_SOFT_RESET, SOFT_RESET_CP, in gfx_v10_0_soft_reset()
7639 GRBM_SOFT_RESET, SOFT_RESET_GFX, in gfx_v10_0_soft_reset()
7645 GRBM_SOFT_RESET, SOFT_RESET_CP, in gfx_v10_0_soft_reset()
7660 GRBM_SOFT_RESET, in gfx_v10_0_soft_reset()
7667 GRBM_SOFT_RESET, in gfx_v10_0_soft_reset()
A Dsdma_v5_2.c818 GRBM_SOFT_RESET, SOFT_RESET_SDMA0, in sdma_v5_2_soft_reset()
A Dgfx_v6_0.c2497 WREG32_FIELD(GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); in gfx_v6_0_rlc_reset()
2499 WREG32_FIELD(GRBM_SOFT_RESET, SOFT_RESET_RLC, 0); in gfx_v6_0_rlc_reset()

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