Searched refs:HHI_HDMI_PLL_CNTL (Results 1 – 3 of 3) sorted by relevance
| /linux/drivers/gpu/drm/meson/ |
| A D | meson_vclk.c | 267 regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL, in meson_venci_cvbs_clock_config()
269 regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL, in meson_venci_cvbs_clock_config()
510 regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL, in meson_hdmi_pll_set_params()
526 regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL, in meson_hdmi_pll_set_params()
528 regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL, in meson_hdmi_pll_set_params()
539 regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL, in meson_hdmi_pll_set_params()
569 regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL, in meson_hdmi_pll_set_params()
578 HHI_HDMI_PLL_CNTL, val, in meson_hdmi_pll_set_params()
594 regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL, in meson_hdmi_pll_set_params()
605 regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL, in meson_hdmi_pll_set_params()
[all …]
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| /linux/drivers/clk/meson/ |
| A D | gxbb.c | 166 .reg_off = HHI_HDMI_PLL_CNTL,
171 .reg_off = HHI_HDMI_PLL_CNTL,
176 .reg_off = HHI_HDMI_PLL_CNTL,
186 .reg_off = HHI_HDMI_PLL_CNTL,
191 .reg_off = HHI_HDMI_PLL_CNTL,
214 .reg_off = HHI_HDMI_PLL_CNTL,
219 .reg_off = HHI_HDMI_PLL_CNTL,
224 .reg_off = HHI_HDMI_PLL_CNTL,
240 .reg_off = HHI_HDMI_PLL_CNTL,
245 .reg_off = HHI_HDMI_PLL_CNTL,
[all …]
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| A D | gxbb.h | 97 #define HHI_HDMI_PLL_CNTL 0x320 /* 0xc8 offset in data sheet */ macro
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