/linux/drivers/gpu/drm/i915/display/ |
A D | g4x_dp.c | 83 } else if (IS_CHERRYVIEW(dev_priv)) { in g4x_dp_set_clock() 177 if (IS_CHERRYVIEW(dev_priv)) in intel_dp_prepare() 306 else if (IS_CHERRYVIEW(dev_priv)) in g4x_dp_port_enabled() 483 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dp_link_down() 672 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_enable_dp() 682 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_enable_dp() 685 if (IS_CHERRYVIEW(dev_priv)) in intel_enable_dp() 1288 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dp_encoder_reset() 1338 if (IS_CHERRYVIEW(dev_priv)) { in g4x_dp_init() 1364 if (IS_CHERRYVIEW(dev_priv)) in g4x_dp_init() [all …]
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A D | intel_pps.c | 77 if (IS_CHERRYVIEW(dev_priv)) in vlv_power_sequencer_kick() 89 release_cl_override = IS_CHERRYVIEW(dev_priv) && in vlv_power_sequencer_kick() 368 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_pps_get_registers() 410 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in edp_have_panel_power() 423 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in edp_have_panel_vdd() 1299 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in pps_init_registers() 1360 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_pps_encoder_reset() 1390 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_pps_unlock_regs_wa() 1407 else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_pps_setup() 1446 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in assert_pps_unlocked()
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A D | i9xx_plane.c | 144 if (IS_CHERRYVIEW(dev_priv)) in i9xx_plane_has_windowing() 462 } else if (IS_CHERRYVIEW(dev_priv) && i9xx_plane == PLANE_B) { in i9xx_update_plane() 799 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_primary_plane_create() 833 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_primary_plane_create() 859 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_primary_plane_create() 896 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) { in intel_primary_plane_create() 1000 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B && in i9xx_get_initial_plane_config()
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A D | intel_drrs.c | 123 if (DISPLAY_VER(dev_priv) >= 8 && !IS_CHERRYVIEW(dev_priv)) { in intel_drrs_set_state() 142 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_drrs_set_state() 147 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_drrs_set_state()
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A D | intel_pipe_crc.c | 154 if (!IS_CHERRYVIEW(dev_priv)) in vlv_pipe_crc_ctl_reg() 417 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in get_new_crc_ctl_reg() 547 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_is_valid_crc_source() 623 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_crtc_set_crc_source()
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A D | intel_lpe_audio.c | 120 pdata->num_ports = IS_CHERRYVIEW(dev_priv) ? 3 : 2; /* B,C,D or B,C */ in lpe_audio_platdev_create() 185 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in lpe_audio_detect()
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A D | g4x_hdmi.c | 50 else if (IS_CHERRYVIEW(dev_priv)) in intel_hdmi_prepare() 567 if (IS_CHERRYVIEW(dev_priv)) { in g4x_hdmi_init() 592 if (IS_CHERRYVIEW(dev_priv)) { in g4x_hdmi_init()
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A D | intel_vga.c | 17 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_vga_cntrl_reg()
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A D | intel_cdclk.c | 536 if (IS_CHERRYVIEW(dev_priv)) in vlv_program_pfi_credits() 543 if (IS_CHERRYVIEW(dev_priv)) in vlv_program_pfi_credits() 2082 else if (IS_CHERRYVIEW(dev_priv)) in intel_pixel_rate_to_cdclk() 2150 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_crtc_compute_min_cdclk() 2643 else if (IS_CHERRYVIEW(dev_priv)) in intel_compute_max_dotclk() 2712 } else if (IS_CHERRYVIEW(dev_priv)) { in intel_update_max_cdclk() 2746 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_update_cdclk() 2877 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_read_rawclk() 3079 } else if (IS_CHERRYVIEW(dev_priv)) { in intel_init_cdclk_hooks()
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A D | intel_sprite.c | 457 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) in vlv_update_plane() 1408 if (IS_CHERRYVIEW(dev_priv) && in chv_plane_check_rotation() 1504 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_sprite_set_colorkey_ioctl() 1764 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_sprite_plane_create() 1772 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) { in intel_sprite_plane_create() 1823 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) { in intel_sprite_plane_create()
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A D | vlv_dsi_pll.c | 72 if (IS_CHERRYVIEW(dev_priv)) { in dsi_calc_mnp() 267 int refclk = IS_CHERRYVIEW(dev_priv) ? 100000 : 25000; in vlv_dsi_get_pclk()
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A D | intel_crtc.c | 302 if (IS_CHERRYVIEW(dev_priv) || in intel_crtc_init() 398 bool need_vlv_dsi_wa = (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_pipe_update_start()
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A D | intel_dsi_vbt.c | 386 else if (IS_CHERRYVIEW(dev_priv)) in mipi_exec_gpio() 874 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_dsi_vbt_gpio_init() 934 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_dsi_vbt_gpio_cleanup()
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A D | intel_display.c | 3107 if (IS_CHERRYVIEW(dev_priv)) in valleyview_crtc_enable() 3218 if (IS_CHERRYVIEW(dev_priv)) in i9xx_crtc_disable() 4007 IS_CHERRYVIEW(dev_priv)) { in i9xx_set_pipeconf() 4212 IS_CHERRYVIEW(dev_priv)) { in i9xx_get_pipe_config() 4235 if (IS_CHERRYVIEW(dev_priv)) in i9xx_get_pipe_config() 4286 if (IS_CHERRYVIEW(dev_priv)) in i9xx_get_pipe_config() 6534 IS_CHERRYVIEW(dev_priv))) in compute_baseline_pipe_bpp() 6831 if (IS_CHERRYVIEW(dev_priv)) in intel_dump_pipe_config() 7704 if (IS_CHERRYVIEW(dev_priv)) in intel_pipe_config_compare() 10366 if (IS_CHERRYVIEW(dev_priv)) { in intel_setup_outputs() [all …]
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A D | intel_audio.c | 707 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in ilk_audio_codec_disable() 768 IS_CHERRYVIEW(dev_priv)) { in ilk_audio_codec_enable() 941 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_init_audio_hooks()
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/linux/drivers/gpu/drm/i915/selftests/ |
A D | intel_uncore.c | 169 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) { in live_forcewake_ops() 281 !IS_CHERRYVIEW(gt->i915)) in live_forcewake_domains()
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/linux/drivers/gpu/drm/i915/ |
A D | i915_sysfs.c | 522 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in i915_setup_sysfs() 546 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_setup_sysfs() 564 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_teardown_sysfs()
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A D | vlv_suspend.c | 395 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in vlv_suspend_complete() 440 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in vlv_resume_prepare()
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A D | vlv_sideband.c | 221 if (IS_CHERRYVIEW(i915)) in vlv_dpio_phy_iosf_port()
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A D | i915_irq.c | 188 IS_CHERRYVIEW(dev_priv)) in intel_hpd_init_pins() 1592 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i9xx_hpd_irq_ack() 1631 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i9xx_hpd_irq_handler() 1646 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in i9xx_hpd_irq_handler() 3016 if (IS_CHERRYVIEW(dev_priv)) in vlv_display_irq_reset() 3050 if (IS_CHERRYVIEW(dev_priv)) in vlv_display_irq_postinstall() 4398 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_irq_init() 4446 if (IS_CHERRYVIEW(dev_priv)) in intel_irq_handler() 4471 if (IS_CHERRYVIEW(dev_priv)) in intel_irq_reset() 4496 if (IS_CHERRYVIEW(dev_priv)) in intel_irq_postinstall()
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A D | i915_drv.c | 160 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_setup_mchbar() 1595 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in intel_runtime_suspend() 1641 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) { in intel_runtime_resume()
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/linux/drivers/gpu/drm/i915/gt/ |
A D | intel_rps.c | 832 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in rps_set() 1383 else if (IS_CHERRYVIEW(i915)) in intel_rps_enable() 1478 else if (IS_CHERRYVIEW(i915)) in intel_gpu_freq() 1495 else if (IS_CHERRYVIEW(i915)) in intel_freq_opcode() 1711 adj = IS_CHERRYVIEW(gt->i915) ? 2 : 1; in rps_work() 1727 adj = IS_CHERRYVIEW(gt->i915) ? -2 : -1; in rps_work() 1854 if (IS_CHERRYVIEW(i915)) in intel_rps_init() 1922 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_rps_get_cagf() 1943 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in read_cagf()
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A D | intel_rc6.c | 553 if (IS_CHERRYVIEW(i915)) in intel_rc6_init() 591 if (IS_CHERRYVIEW(i915)) in intel_rc6_enable() 758 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in intel_rc6_residency_ns()
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A D | intel_gtt.c | 365 else if (IS_CHERRYVIEW(i915)) in gtt_write_workarounds() 533 else if (IS_CHERRYVIEW(i915) || IS_GEN9_LP(i915)) in setup_private_pat()
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A D | selftest_rc6.c | 51 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) in live_rc6_manual()
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