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Searched refs:IS_DG1 (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
A Dintel_combo_phy.c140 IS_DG1(i915)) in has_phy_misc()
207 else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) in phy_is_master()
385 if (IS_TIGERLAKE(dev_priv) || IS_DG1(dev_priv)) { in icl_combo_phys_uninit()
A Dintel_dpll_mgr.c167 if (IS_DG1(i915)) in intel_combo_pll_enable_reg()
3155 } else if (IS_DG1(dev_priv)) { in icl_get_combo_phy_dpll()
3466 } else if (IS_DG1(dev_priv)) { in icl_pll_get_hw_state()
3525 } else if (IS_DG1(dev_priv)) { in icl_dpll_write()
4069 else if (IS_DG1(dev_priv)) in intel_shared_dpll_init()
A Dintel_dmc.c690 } else if (IS_DG1(dev_priv)) { in intel_dmc_ucode_init()
A Dintel_bw.c166 if (IS_DG1(dev_priv)) in icl_get_qgv_points()
A Dintel_bios.c1826 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) in dvo_port_to_port()
2935 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) in intel_bios_port_aux_ch()
2945 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) in intel_bios_port_aux_ch()
A Dintel_ddi_buf_trans.c1638 } else if (IS_DG1(i915)) { in intel_ddi_buf_trans_init()
A Dintel_display_power.c4988 if (IS_DG1(dev_priv)) in get_allowed_dc_mask()
5134 } else if (IS_DG1(dev_priv)) { in intel_power_domains_init()
5738 if (IS_DGFX(dev_priv) && !IS_DG1(dev_priv)) in tgl_bw_buddy_init()
A Dskl_universal_plane.c1960 if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv) || in gen12_plane_supports_mc_ccs()
A Dintel_ddi.c4506 } else if (IS_DG1(dev_priv)) { in intel_ddi_init()
4572 else if (IS_DG1(dev_priv)) in intel_ddi_init()
A Dintel_display.c2858 else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) in intel_phy_is_combo()
2905 else if ((IS_DG1(i915) || IS_ROCKETLAKE(i915)) && port >= PORT_TC1) in intel_port_to_phy()
10235 } else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) { in intel_setup_outputs()
A Dintel_dp.c406 IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) in intel_dp_set_source_rates()
/linux/drivers/gpu/drm/i915/gt/
A Dintel_workarounds.c726 if (IS_DG1(i915)) in __intel_engine_init_ctx_wa()
1226 if (IS_DG1(i915)) in dg1_gt_workarounds_init()
1233 if (IS_DG1(i915)) in dg1_gt_workarounds_init()
1251 else if (IS_DG1(i915)) in gt_init_workarounds()
1642 if (IS_DG1(i915)) in intel_engine_init_whitelist()
1742 if (IS_ALDERLAKE_P(i915) || IS_ALDERLAKE_S(i915) || IS_DG1(i915) || in rcs_engine_wa_init()
1799 if (IS_DG1(i915) || IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915) || in rcs_engine_wa_init()
A Dintel_mocs.c443 } else if (IS_DG1(i915)) { in get_mocs_settings()
/linux/drivers/gpu/drm/i915/
A Dintel_step.c146 } else if (IS_DG1(i915)) { in intel_step_init()
A Dintel_pch.c208 if (IS_DG1(dev_priv)) { in intel_detect_pch()
A Di915_drv.h1464 #define IS_DG1(dev_priv) IS_PLATFORM(dev_priv, INTEL_DG1) macro
1561 (IS_DG1(p) && IS_GT_STEP(p, since, until))
1563 (IS_DG1(p) && IS_DISPLAY_STEP(p, since, until))
A Dintel_pm.c7448 IS_ALDERLAKE_S(dev_priv) || IS_DG1(dev_priv)) in gen12lp_init_clock_gating()
7929 else if (IS_DG1(dev_priv)) in intel_init_clock_gating_hooks()

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