| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_link_hwss.c | 526 if (dc_is_virtual_signal(stream->signal) || IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) in dp_set_dsc_on_rx()
577 if (dc_is_dp_signal(stream->signal) && !IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)
580 if (dc_is_dp_signal(stream->signal) && !IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
617 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
776 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
799 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
823 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
|
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/ |
| A D | dce112_clk_mgr.c | 114 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dce112_set_clock()
156 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dce112_set_dispclk()
|
| /linux/drivers/gpu/drm/amd/display/dc/gpio/ |
| A D | hw_translate.c | 67 if (IS_FPGA_MAXIMUS_DC(dce_environment)) { in dal_hw_translate_init()
|
| A D | hw_factory.c | 69 if (IS_FPGA_MAXIMUS_DC(dce_environment)) { in dal_hw_factory_init()
|
| /linux/drivers/gpu/drm/amd/display/dc/dce112/ |
| A D | dce112_hw_sequencer.c | 123 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) in dce112_enable_display_power_gating()
|
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| A D | rv1_clk_mgr_vbios_smu.c | 135 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in rv1_vbios_smu_set_dispclk()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| A D | dcn31_hwseq.c | 120 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn31_init_hw()
156 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn31_init_hw()
544 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn31_reset_back_end_for_pipe()
|
| A D | dcn31_init.c | 150 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn31_hw_sequencer_construct()
|
| A D | dcn31_resource.c | 1486 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) in dcn31_hwseq_create()
2121 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) in dcn31_update_bw_bounding_box()
2470 (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment) ? in dcn31_resource_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| A D | dcn20_init.c | 142 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn20_hw_sequencer_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dce120/ |
| A D | dce120_hw_sequencer.c | 162 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) in dce120_enable_display_power_gating()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn21/ |
| A D | dcn21_init.c | 148 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn21_hw_sequencer_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| A D | dcn30_init.c | 147 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn30_hw_sequencer_construct()
|
| A D | dcn30_hwseq.c | 451 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn30_init_hw()
495 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn30_init_hw()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| A D | dcn201_hwseq.c | 234 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn201_init_hw()
250 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn201_init_hw()
366 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) in dcn201_init_hw()
|
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| A D | rn_clk_mgr_vbios_smu.c | 131 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in rn_vbios_smu_set_dispclk()
|
| A D | rn_clk_mgr.c | 965 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) { in rn_clk_mgr_construct()
1026 if (!IS_FPGA_MAXIMUS_DC(ctx->dce_environment) && clk_mgr->smu_ver >= 0x00371500) { in rn_clk_mgr_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/ |
| A D | dc_types.h | 72 #define IS_FPGA_MAXIMUS_DC(dce_environment) \ macro
76 (IS_FPGA_MAXIMUS_DC(dce_environment) || (dce_environment == DCE_ENV_DIAG))
|
| A D | dc_helper.c | 488 !IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) in generic_reg_wait()
500 if (!IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) in generic_reg_wait()
|
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
| A D | dcn201_clk_mgr.c | 235 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) { in dcn201_clk_mgr_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
| A D | dcn20_clk_mgr.c | 552 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) { in dcn20_clk_mgr_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| A D | dcn30_clk_mgr.c | 551 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) { in dcn3_clk_mgr_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_hw_sequencer.c | 978 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn10_reset_back_end_for_pipe()
1391 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn10_init_hw()
1422 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn10_init_hw()
2970 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn10_prepare_bandwidth()
3003 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn10_optimize_bandwidth()
|
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| A D | dcn31_clk_mgr.c | 675 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) { in dcn31_clk_mgr_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| A D | vg_clk_mgr.c | 775 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) { in vg_clk_mgr_construct()
|