Searched refs:LCD_SPU_DMA_CTRL0 (Results 1 – 7 of 7) sorted by relevance
| /linux/drivers/gpu/drm/armada/ |
| A D | armada_crtc.c | 164 base + LCD_SPU_DMA_CTRL0); in armada_drm_update_gamma()
166 armada_updatel(0, CFG_GAMMA_ENA, base + LCD_SPU_DMA_CTRL0); in armada_drm_update_gamma()
287 base + LCD_SPU_DMA_CTRL0); in armada_drm_crtc_irq()
649 armada_updatel(0, CFG_HWC_ENA, dcrtc->base + LCD_SPU_DMA_CTRL0); in armada_drm_crtc_cursor_update()
672 armada_updatel(0, CFG_HWC_ENA, dcrtc->base + LCD_SPU_DMA_CTRL0); in armada_drm_crtc_cursor_update()
966 armada_updatel(CFG_ARBFAST_ENA, 0, dcrtc->base + LCD_SPU_DMA_CTRL0); in armada_drm_crtc_create()
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| A D | armada_plane.c | 221 LCD_SPU_DMA_CTRL0); in armada_drm_primary_plane_atomic_update()
249 armada_reg_queue_mod(regs, idx, 0, CFG_GRA_ENA, LCD_SPU_DMA_CTRL0); in armada_drm_primary_plane_atomic_disable()
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| A D | armada_hw.h | 60 LCD_SPU_DMA_CTRL0 = 0x0190, enumerator
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| A D | armada_overlay.c | 174 LCD_SPU_DMA_CTRL0); in armada_drm_overlay_plane_atomic_update()
242 armada_reg_queue_mod(regs, idx, 0, CFG_DMA_ENA, LCD_SPU_DMA_CTRL0); in armada_drm_overlay_plane_atomic_disable()
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| /linux/drivers/video/fbdev/ |
| A D | pxa168fb.c | 297 x = readl(fbi->reg_base + LCD_SPU_DMA_CTRL0); in set_dma_control0()
322 writel(x, fbi->reg_base + LCD_SPU_DMA_CTRL0); in set_dma_control0()
781 data = readl(fbi->reg_base + LCD_SPU_DMA_CTRL0); in pxa168fb_remove()
783 writel(data, fbi->reg_base + LCD_SPU_DMA_CTRL0); in pxa168fb_remove()
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| A D | pxa168fb.h | 208 #define LCD_SPU_DMA_CTRL0 0x0190 macro
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| /linux/drivers/video/fbdev/mmp/hw/ |
| A D | mmp_ctrl.h | 126 LCD_PN2_CTRL0) : LCD_SPU_DMA_CTRL0)
417 #define LCD_SPU_DMA_CTRL0 0x0190 macro
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