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/linux/Documentation/devicetree/bindings/display/bridge/
A Drenesas,lvds.yaml7 title: Renesas R-Car LVDS Encoder
19 - renesas,r8a7742-lvds # for RZ/G1H compatible LVDS encoders
20 - renesas,r8a7743-lvds # for RZ/G1M compatible LVDS encoders
21 - renesas,r8a7744-lvds # for RZ/G1N compatible LVDS encoders
22 - renesas,r8a774a1-lvds # for RZ/G2M compatible LVDS encoders
23 - renesas,r8a774b1-lvds # for RZ/G2N compatible LVDS encoders
24 - renesas,r8a774c0-lvds # for RZ/G2E compatible LVDS encoders
25 - renesas,r8a774e1-lvds # for RZ/G2H compatible LVDS encoders
26 - renesas,r8a7790-lvds # for R-Car H2 compatible LVDS encoders
61 description: LVDS output port
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A Dlvds-codec.yaml7 title: Transparent LVDS encoders and decoders
13 This binding supports transparent LVDS encoders and decoders that don't
18 to LVDS panels. This binding targets devices compatible with the following
23 [LDI] "Open LVDS Display Interface", May 1999 (Version 0.95), National
39 - const: lvds-encoder # Generic LVDS encoder compatible fallback
42 - ti,ds90cf384a # For the DS90CF384A FPD-Link LVDS Receiver
45 - thine,thc63lvdm83d # For the THC63LVDM83D LVDS serializer
54 For LVDS encoders, port 0 is the parallel input
55 For LVDS decoders, port 0 is the LVDS input
75 For LVDS encoders, port 1 is the LVDS output
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A Dtoshiba,tc358775.yaml7 title: Toshiba TC358775 DSI to LVDS bridge bindings
13 This binding supports DSI to LVDS bridge TC358775
17 Up to 1600x1200 24-bit/pixel resolution for single-link LVDS display panel
18 limited by 135 MHz LVDS speed
19 Up to WUXGA (1920x1200 24-bit pixels) resolution for dual-link LVDS display
20 panel, limited by 270 MHz LVDS speed.
31 description: 1.2V LVDS Power Supply
57 Video port for LVDS output (panel or connector).
62 Video port for Dual link LVDS output (panel or connector).
83 /* For single-link LVDS display panel */
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A Dthine,thc63lvd1024.yaml7 title: Thine Electronics THC63LVD1024 LVDS Decoder
14 The THC63LVD1024 is a dual link LVDS receiver designed to convert LVDS
16 modes, handling up to two LVDS input streams and up to two digital CMOS/TTL
45 description: First LVDS input port
49 description: Second LVDS input port
73 Power supply for the TTL output, TTL CLOCKOUT signal, LVDS input, PLL and
A Dti,sn65dsi83.yaml7 title: SN65DSI83 and SN65DSI84 DSI to LVDS bridge chip
14 to 1x Single-link LVDS
17 to 1x Dual-link or 2x Single-link LVDS
81 description: Video port for LVDS Channel-A output (panel or bridge).
85 description: Video port for LVDS Channel-B output (panel or bridge).
A Dtoshiba,tc358764.txt1 TC358764 MIPI-DSI to LVDS panel bridge
14 1: LVDS Output, mandatory
A Dmegachips-stdpxxxx-ge-b850v3-fw.txt2 STDP4028-ge-b850v3-fw bridges (LVDS-DP)
7 Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
/linux/Documentation/devicetree/bindings/display/imx/
A Dldb.txt1 Device-Tree bindings for LVDS Display Bridge (ldb)
3 LVDS Display Bridge
7 nodes describing each of the two LVDS encoder channels of the bridge.
15 interfaces as input for each LVDS channel.
23 "di0_pll" - LDB LVDS channel 0 mux
24 "di1_pll" - LDB LVDS channel 1 mux
25 "di0" - LDB LVDS channel 0 gate
26 "di1" - LDB LVDS channel 1 gate
44 LVDS Channel
59 to the four LVDS multiplexer inputs.
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/linux/Documentation/devicetree/bindings/display/panel/
A Dlvds.yaml7 title: LVDS Display Panel
14 LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
16 to LVDS panels. This bindings supports display panels compatible with the
21 [LDI] "Open LVDS Display Interface", May 1999 (Version 0.95), National
49 LVDS data mappings are defined as follows.
52 [VESA] specifications. Data are transferred as follows on 3 LVDS lanes.
63 specifications. Data are transferred as follows on 4 LVDS lanes.
75 Data are transferred as follows on 4 LVDS lanes.
A Dadvantech,idk-2121wr.yaml7 title: Advantech IDK-2121WR 21.5" Full-HD dual-LVDS panel
14 The IDK-2121WR from Advantech is a Full-HD dual-LVDS panel.
15 A dual-LVDS interface is a dual-link connection with even pixels traveling
A Dpanel-simple.yaml157 # HannStar Display Corp. HSD100PXN1 10.1" XGA LVDS panel
171 # Innolux Corporation 10.1" G101ICE-L01 WXGA (1280x800) LVDS panel
191 # Kaohsiung Opto-Electronics Inc. 10.1" WUXGA (1920 x 1200) LVDS TFT LCD panel
193 # Kaohsiung Opto-Electronics. TX31D200VM0BAA 12.3" HSXGA LVDS panel
225 # Multi-Inno Technology Co.,Ltd MI1010AIT-1CP 10.1" 1280x800 LVDS IPS Cap Touch Mod.
227 # NEC LCD Technologies, Ltd. 12.1" WXGA (1280x800) LVDS TFT LCD panel
237 # NLT Technologies, Ltd. 15.6" FHD (1920x1080) LVDS TFT LCD panel
306 # Supported are LVDS versions (-11T, -19T) and parallel ones
/linux/drivers/gpu/drm/bridge/
A DKconfig145 GE B850v3 that convert dual channel LVDS
166 tristate "NXP PTN3460 DP/LVDS bridge"
171 NXP PTN3460 eDP-LVDS bridge chip driver.
174 tristate "Parade eDP/LVDS bridge"
180 Parade eDP-LVDS bridge chip driver.
229 tristate "Thine THC63LVD1024 LVDS decoder bridge"
232 Thine THC63LVD1024 LVDS/parallel converter driver.
244 tristate "TC358764 DSI/LVDS bridge"
250 Toshiba TC358764 DSI/LVDS bridge driver.
272 tristate "Toshiba TC358775 DSI/LVDS bridge"
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/linux/arch/arm64/boot/dts/renesas/
A Dr8a774c0-ek874-idk-2121wr.dts4 * connected to an Advantech IDK-2121WR 21.5" LVDS panel
68 * When GP0_17 is low LVDS[01] are connected to the LVDS connector
69 * When GP0_17 is high LVDS[01] are connected to the LT8918L
A Dhihope-rzg2-ex-lvds.dtsi3 * Device Tree Source for the RZ/G2[MN] HiHope sub board LVDS common parts
20 * When GP1_20 is LOW LVDS0 is connected to the LVDS connector
A Dr8a774e1-hihope-rzg2h-ex-idk-1110wr.dts4 * to an Advantech IDK-1110WR 10.1" LVDS panel
/linux/drivers/gpu/drm/rockchip/
A DKconfig65 bool "Rockchip LVDS support"
69 Choose this option to enable support for Rockchip LVDS controllers.
70 Rockchip rk3288 SoC has LVDS TX Controller can be used, and it
71 support LVDS, rgb, dual LVDS output mode. say Y to enable its
/linux/Documentation/devicetree/bindings/display/
A Drenesas,du.yaml189 description: LVDS 0
359 description: LVDS 0
420 description: LVDS 0
422 description: LVDS 1
491 description: LVDS 0
562 description: LVDS 0
633 description: LVDS 0
692 description: LVDS 0
753 description: LVDS 0
755 description: LVDS 1
/linux/drivers/gpu/drm/imx/
A DKconfig29 tristate "Support for LVDS displays"
34 Choose this to enable the internal LVDS Display Bridge (LDB)
/linux/Documentation/devicetree/bindings/clock/
A Dti,lmk04832.yaml113 LVDS 0x01
200 ti,clkout-fmt = <0x01>; // LVDS
205 ti,clkout-fmt = <0x01>; // LVDS
A Dsilabs,si5341.txt87 1 = differential (defaults to LVDS levels)
123 silabs,format = <1>; /* LVDS 3v3 */
131 * LVDS 1v8
135 silabs,format = <1>; /* LVDS 1v8 */
/linux/drivers/gpu/drm/rcar-du/
A DKconfig32 tristate "R-Car DU LVDS Encoder Support"
39 Enable support for the R-Car Display Unit embedded LVDS encoders.
/linux/Documentation/devicetree/bindings/display/msm/
A Dmdp4.txt23 that are external to the MDP hardware, such as HDMI, DSI, EDP etc (LVDS is a
33 Port 0 -> LCDC/LVDS
/linux/Documentation/devicetree/bindings/display/rockchip/
A Drockchip-lvds.txt1 Rockchip RK3288 LVDS interface
22 - phys: LVDS/DSI DPHY (px30 only)
/linux/drivers/phy/rockchip/
A DKconfig61 tristate "Rockchip Innosilicon MIPI/LVDS/TTL PHY driver"
66 Enable this to support the Rockchip MIPI/LVDS/TTL PHY with
/linux/drivers/gpu/drm/gma500/
A Dpsb_intel_display.c224 u32 lvds = REG_READ(LVDS); in psb_intel_crtc_mode_set()
244 REG_WRITE(LVDS, lvds); in psb_intel_crtc_mode_set()
245 REG_READ(LVDS); in psb_intel_crtc_mode_set()
316 is_lvds = (pipe == 1) && (REG_READ(LVDS) & LVDS_PORT_EN); in psb_intel_crtc_clock_get()

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