MMC_TIMING_MMC_DDR52 (reference) in projects: linux

Project(s)

Full Search
Definition
Symbol
File Path
Type

Searched refs:MMC_TIMING_MMC_DDR52 (Results 1 – 25 of 37) sorted by relevance

/linux/drivers/mmc/host/
A D	dw_mmc-hi3798cv200.c	`38 if (ios->timing == MMC_TIMING_MMC_DDR52 \|\| in dw_mci_hi3798cv200_set_ios() 46 if (ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_hi3798cv200_set_ios()`
A D	dw_mmc-rockchip.c	`47 ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_rk3288_set_ios() 105 case MMC_TIMING_MMC_DDR52: in dw_mci_rk3288_set_ios()`
A D	sdhci-of-arasan.c	`659 case MMC_TIMING_MMC_DDR52: in sdhci_zynqmp_sdcardclk_set_phase() 728 case MMC_TIMING_MMC_DDR52: in sdhci_zynqmp_sampleclk_set_phase() 788 case MMC_TIMING_MMC_DDR52: in sdhci_versal_sdcardclk_set_phase() 855 case MMC_TIMING_MMC_DDR52: in sdhci_versal_sampleclk_set_phase() 1125 arasan_dt_read_clk_phase(dev, clk_data, MMC_TIMING_MMC_DDR52, in arasan_dt_parse_clk_phases()`
A D	sdhci-xenon.c	`215 (timing == MMC_TIMING_MMC_DDR52)) in xenon_set_uhs_signaling() 370 host->timing == MMC_TIMING_MMC_DDR52) in xenon_execute_tuning()`
A D	sdhci-sprd.c	`100 { "sprd,phy-delay-mmc-ddr52", MMC_TIMING_MMC_DDR52, }, 345 case MMC_TIMING_MMC_DDR52: in sdhci_sprd_set_uhs_signaling()`
A D	sdhci-xenon-phy.c	`621 case MMC_TIMING_MMC_DDR52: in xenon_emmc_phy_set() 753 case MMC_TIMING_MMC_DDR52: in xenon_hs_delay_adj()`
A D	sdhci_am654.c	`129 [MMC_TIMING_MMC_DDR52] = {"ti,otap-del-sel-ddr52", 617 if (i <= MMC_TIMING_MMC_DDR52) in sdhci_am654_get_otap_delay()`
A D	sdhci-omap.c	`831 if (timing == MMC_TIMING_UHS_DDR50 \|\| timing == MMC_TIMING_MMC_DDR52) in sdhci_omap_set_uhs_signaling() 1174 pinctrl_state[MMC_TIMING_MMC_DDR52] = state; in sdhci_omap_config_iodelay_pinctrl_state() 1180 pinctrl_state[MMC_TIMING_MMC_DDR52] = state; in sdhci_omap_config_iodelay_pinctrl_state()`
A D	sdhci-brcmstb.c	`90 (timing == MMC_TIMING_MMC_DDR52)) in sdhci_brcmstb_set_uhs_signaling()`
A D	sdhci-pci-arasan.c	`283 case MMC_TIMING_MMC_DDR52: in arasan_select_phy_clock()`
A D	sunxi-mmc.c	`741 ios->timing != MMC_TIMING_MMC_DDR52) { in sunxi_mmc_clk_set_phase() 786 if (ios->timing == MMC_TIMING_MMC_DDR52 && in sunxi_mmc_clk_set_rate() 891 ios->timing == MMC_TIMING_MMC_DDR52) in sunxi_mmc_set_clk()`
A D	sdhci-cadence.c	`288 case MMC_TIMING_MMC_DDR52: in sdhci_cdns_set_uhs_signaling()`
A D	sdhci-of-at91.c	`103 if (timing == MMC_TIMING_MMC_DDR52) in sdhci_at91_set_uhs_signaling()`
A D	sdhci-st.c	`292 case MMC_TIMING_MMC_DDR52: in sdhci_st_set_uhs_signaling()`
A D	sdhci-of-dwcmshc.c	`150 (timing == MMC_TIMING_MMC_DDR52)) in dwcmshc_set_uhs_signaling()`
A D	dw_mmc-exynos.c	`309 case MMC_TIMING_MMC_DDR52: in dw_mci_exynos_set_ios()`
A D	mmci_stm32_sdmmc.c	`199 if (host->mmc->ios.timing == MMC_TIMING_MMC_DDR52 \|\| in mmci_sdmmc_set_clkreg()`
A D	sdhci-pxav3.c	`267 case MMC_TIMING_MMC_DDR52: in pxav3_set_uhs_signaling()`
A D	meson-gx-mmc.c	`562 case MMC_TIMING_MMC_DDR52: in meson_mmc_prepare_ios_clock() 582 case MMC_TIMING_MMC_DDR52: in meson_mmc_check_resampling()`
A D	rtsx_pci_sdmmc.c	`1027 case MMC_TIMING_MMC_DDR52: in sd_set_timing() 1108 case MMC_TIMING_MMC_DDR52: in sdmmc_set_ios()`
/linux/drivers/mmc/core/
A D	host.h	`73 return card->host->ios.timing == MMC_TIMING_MMC_DDR52; in mmc_card_ddr52()`
A D	debugfs.c	`144 case MMC_TIMING_MMC_DDR52: in mmc_ios_show()`
A D	host.c	`259 &map->phase[MMC_TIMING_MMC_DDR52]); in mmc_of_parse_clk_phase()`
/linux/include/linux/mmc/
A D	host.h	`61 #define MMC_TIMING_MMC_DDR52 8 macro`
/linux/drivers/staging/greybus/
A D	sdio.c	`668 case MMC_TIMING_MMC_DDR52: in gb_mmc_set_ios()`

Completed in 42 milliseconds