Searched refs:MTK_M4U_ID (Results 1 – 7 of 7) sorted by relevance
/linux/include/dt-bindings/memory/ |
A D | mt8192-larb-port.h | 31 #define M4U_PORT_L0_OVL_RDMA0 MTK_M4U_ID(0, 2) 32 #define M4U_PORT_L0_DISP_RDMA0 MTK_M4U_ID(0, 3) 33 #define M4U_PORT_L0_DISP_WDMA0 MTK_M4U_ID(0, 4) 34 #define M4U_PORT_L0_DISP_FAKE0 MTK_M4U_ID(0, 5) 42 #define M4U_PORT_L1_DISP_RDMA4 MTK_M4U_ID(1, 5) 44 #define M4U_PORT_L1_DISP_FAKE1 MTK_M4U_ID(1, 7) 47 #define M4U_PORT_L2_MDP_RDMA0 MTK_M4U_ID(2, 0) 48 #define M4U_PORT_L2_MDP_RDMA1 MTK_M4U_ID(2, 1) 49 #define M4U_PORT_L2_MDP_WROT0 MTK_M4U_ID(2, 2) 50 #define M4U_PORT_L2_MDP_WROT1 MTK_M4U_ID(2, 3) [all …]
|
A D | mt6779-larb-port.h | 29 #define M4U_PORT_DISP_OVL0 MTK_M4U_ID(M4U_LARB0_ID, 3) 30 #define M4U_PORT_DISP_OVL1 MTK_M4U_ID(M4U_LARB0_ID, 4) 31 #define M4U_PORT_DISP_PVRIC0 MTK_M4U_ID(M4U_LARB0_ID, 5) 32 #define M4U_PORT_DISP_RDMA0 MTK_M4U_ID(M4U_LARB0_ID, 6) 33 #define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 7) 34 #define M4U_PORT_DISP_FAKE0 MTK_M4U_ID(M4U_LARB0_ID, 8) 44 #define M4U_PORT_MDP_RDMA0 MTK_M4U_ID(M4U_LARB1_ID, 7) 45 #define M4U_PORT_MDP_RDMA1 MTK_M4U_ID(M4U_LARB1_ID, 8) 90 #define M4U_PORT_IMGI_D1 MTK_M4U_ID(M4U_LARB5_ID, 0) 92 #define M4U_PORT_DMGI_D1 MTK_M4U_ID(M4U_LARB5_ID, 2) [all …]
|
A D | mt8183-larb-port.h | 21 #define M4U_PORT_DISP_OVL0 MTK_M4U_ID(M4U_LARB0_ID, 0) 24 #define M4U_PORT_DISP_RDMA0 MTK_M4U_ID(M4U_LARB0_ID, 3) 25 #define M4U_PORT_DISP_RDMA1 MTK_M4U_ID(M4U_LARB0_ID, 4) 26 #define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 5) 27 #define M4U_PORT_MDP_RDMA0 MTK_M4U_ID(M4U_LARB0_ID, 6) 28 #define M4U_PORT_MDP_WROT0 MTK_M4U_ID(M4U_LARB0_ID, 7) 29 #define M4U_PORT_MDP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 8) 42 #define M4U_PORT_IMG_IPUO MTK_M4U_ID(M4U_LARB2_ID, 0) 44 #define M4U_PORT_IMG_IPUI MTK_M4U_ID(M4U_LARB2_ID, 2) 127 #define M4U_PORT_CCU0 MTK_M4U_ID(M4U_LARB7_ID, 0) [all …]
|
A D | mt8173-larb-port.h | 19 #define M4U_PORT_DISP_OVL0 MTK_M4U_ID(M4U_LARB0_ID, 0) 25 #define M4U_PORT_MDP_WDMA MTK_M4U_ID(M4U_LARB0_ID, 6) 41 #define M4U_PORT_IMGO MTK_M4U_ID(M4U_LARB2_ID, 0) 42 #define M4U_PORT_RRZO MTK_M4U_ID(M4U_LARB2_ID, 1) 43 #define M4U_PORT_AAO MTK_M4U_ID(M4U_LARB2_ID, 2) 44 #define M4U_PORT_LCSO MTK_M4U_ID(M4U_LARB2_ID, 3) 47 #define M4U_PORT_LSCI MTK_M4U_ID(M4U_LARB2_ID, 6) 49 #define M4U_PORT_BPCI MTK_M4U_ID(M4U_LARB2_ID, 8) 59 #define M4U_PORT_RB MTK_M4U_ID(M4U_LARB2_ID, 18) 60 #define M4U_PORT_RP MTK_M4U_ID(M4U_LARB2_ID, 19) [all …]
|
A D | mt2712-larb-port.h | 23 #define M4U_PORT_DISP_OVL0 MTK_M4U_ID(M4U_LARB0_ID, 0) 24 #define M4U_PORT_DISP_RDMA0 MTK_M4U_ID(M4U_LARB0_ID, 1) 25 #define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 2) 26 #define M4U_PORT_DISP_OD_R MTK_M4U_ID(M4U_LARB0_ID, 3) 27 #define M4U_PORT_DISP_OD_W MTK_M4U_ID(M4U_LARB0_ID, 4) 28 #define M4U_PORT_MDP_RDMA0 MTK_M4U_ID(M4U_LARB0_ID, 5) 29 #define M4U_PORT_MDP_WDMA MTK_M4U_ID(M4U_LARB0_ID, 6) 46 #define M4U_PORT_CAM_DMA0 MTK_M4U_ID(M4U_LARB2_ID, 0) 87 #define M4U_PORT_VDO MTK_M4U_ID(M4U_LARB8_ID, 0) 88 #define M4U_PORT_NR MTK_M4U_ID(M4U_LARB8_ID, 1) [all …]
|
A D | mt8167-larb-port.h | 18 #define M4U_PORT_DISP_OVL0 MTK_M4U_ID(M4U_LARB0_ID, 0) 19 #define M4U_PORT_DISP_RDMA0 MTK_M4U_ID(M4U_LARB0_ID, 1) 20 #define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 2) 22 #define M4U_PORT_MDP_RDMA MTK_M4U_ID(M4U_LARB0_ID, 4) 23 #define M4U_PORT_MDP_WDMA MTK_M4U_ID(M4U_LARB0_ID, 5) 24 #define M4U_PORT_MDP_WROT MTK_M4U_ID(M4U_LARB0_ID, 6) 25 #define M4U_PORT_DISP_FAKE MTK_M4U_ID(M4U_LARB0_ID, 7) 28 #define M4U_PORT_CAM_IMGO MTK_M4U_ID(M4U_LARB1_ID, 0) 30 #define M4U_PORT_CAM_LSCI MTK_M4U_ID(M4U_LARB1_ID, 2) 32 #define M4U_PORT_CAM_AAO MTK_M4U_ID(M4U_LARB1_ID, 4) [all …]
|
A D | mtk-memory-port.h | 11 #define MTK_M4U_ID(larb, port) (((larb) << 5) | (port)) macro
|
Completed in 13 milliseconds