Home
last modified time | relevance | path

Searched refs:MUX_M1 (Results 1 – 5 of 5) sorted by relevance

/linux/arch/arm64/boot/dts/hisilicon/
A Dhikey960-pinctrl.dtsi30 0x008 MUX_M1 /* PMU1_SSI */
31 0x00c MUX_M1 /* PMU2_SSI */
32 0x010 MUX_M1 /* PMU_CLKOUT */
51 0x058 MUX_M1 /* ISP_CLK0 */
52 0x064 MUX_M1 /* ISP_SCL0 */
53 0x068 MUX_M1 /* ISP_SDA0 */
59 0x05c MUX_M1 /* ISP_CLK1 */
60 0x06c MUX_M1 /* ISP_SCL1 */
61 0x070 MUX_M1 /* ISP_SDA1 */
73 0x02c MUX_M1 /* I2C3_SCL */
[all …]
A Dhikey970-pinctrl.dtsi44 0x06c MUX_M1 /* UART3_RXD */
45 0x070 MUX_M1 /* UART3_TXD */
53 0x07c MUX_M1 /* UART4_RXD */
54 0x080 MUX_M1 /* UART4_TXD */
60 0x05c MUX_M1 /* UART6_RXD */
67 0x010 MUX_M1 /* I2C3_SCL */
68 0x014 MUX_M1 /* I2C3_SDA */
74 0x03c MUX_M1 /* I2C4_SCL */
75 0x040 MUX_M1 /* I2C4_SDA */
144 0x050 MUX_M1 /* I2S2_DI */
[all …]
A Dhikey-pinctrl.dtsi53 0xc MUX_M1 /* SD_CLK (IOMG003) */
54 0x10 MUX_M1 /* SD_CMD (IOMG004) */
55 0x14 MUX_M1 /* SD_DATA0 (IOMG005) */
56 0x18 MUX_M1 /* SD_DATA1 (IOMG006) */
57 0x1c MUX_M1 /* SD_DATA2 (IOMG007) */
58 0x20 MUX_M1 /* SD_DATA3 (IOMG008) */
74 0x128 MUX_M1 /* SDIO_CLK (IOMG074) */
75 0x12c MUX_M1 /* SDIO_CMD (IOMG075) */
229 0x1a4 MUX_M1 /* SPI0_DO (IOMG105) */
230 0x1a8 MUX_M1 /* SPI0_CS_N (IOMG106) */
[all …]
A Dhi6220.dtsi420 &range 2 6 MUX_M1 /* gpio 8: [2..7] */
421 &range 8 8 MUX_M1 /* gpio 9: [0..7] */
422 &range 0 1 MUX_M1 /* gpio 10: [0] */
423 &range 16 7 MUX_M1 /* gpio 10: [1..7] */
424 &range 23 3 MUX_M1 /* gpio 11: [0..2] */
425 &range 28 5 MUX_M1 /* gpio 11: [3..7] */
426 &range 33 3 MUX_M1 /* gpio 12: [0..2] */
427 &range 43 5 MUX_M1 /* gpio 12: [3..7] */
428 &range 48 8 MUX_M1 /* gpio 13: [0..7] */
429 &range 56 8 MUX_M1 /* gpio 14: [0..7] */
[all …]
/linux/include/dt-bindings/pinctrl/
A Dhisi.h22 #define MUX_M1 1 macro

Completed in 9 milliseconds