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Searched refs:M_SCD_TRACE_CFG_RESET (Results 1 – 3 of 3) sorted by relevance

/linux/arch/mips/sibyte/common/
A Dbus_watcher.c168 csr_out32(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); in sibyte_bw_int()
221 csr_out32(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); in sibyte_bus_watcher()
A Dsb_tbprof.c180 __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); in arm_tb()
221 __raw_writeq(M_SCD_TRACE_CFG_RESET, in sbprof_tb_intr()
232 __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); in sbprof_tb_intr()
/linux/arch/mips/include/asm/sibyte/
A Dsb1250_scd.h507 #define M_SCD_TRACE_CFG_RESET _SB_MAKEMASK1(0) macro

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