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Searched refs:NUM_CHANNELS (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/staging/rtl8712/
A Drtl871x_rf.h26 #define NUM_CHANNELS 15 macro
30 u8 channel_set[NUM_CHANNELS];
31 u8 channel_cck_power[NUM_CHANNELS]; /*dbm*/
32 u8 channel_ofdm_power[NUM_CHANNELS];/*dbm*/
/linux/drivers/staging/most/i2c/
A Di2c.c18 enum { CH_RX, CH_TX, NUM_CHANNELS }; enumerator
36 struct most_channel_capability capabilities[NUM_CHANNELS];
71 BUG_ON(ch_idx < 0 || ch_idx >= NUM_CHANNELS); in configure_channel()
125 BUG_ON(ch_idx < 0 || ch_idx >= NUM_CHANNELS); in enqueue()
170 BUG_ON(ch_idx < 0 || ch_idx >= NUM_CHANNELS); in poison_channel()
300 for (i = 0; i < NUM_CHANNELS; i++) { in i2c_probe()
312 dev->most_iface.num_channels = NUM_CHANNELS; in i2c_probe()
/linux/drivers/tty/serial/
A Dip22zilog.c54 #define NUM_CHANNELS (NUM_IP22ZILOG * 2) macro
963 alloc_one_table(NUM_CHANNELS * sizeof(struct uart_ip22zilog_port)); in ip22zilog_alloc_tables()
1071 .nr = NUM_CHANNELS,
1087 for (channel = 0; channel < NUM_CHANNELS; channel++) in ip22zilog_prepare()
1090 ip22zilog_irq_chain = &ip22zilog_port_table[NUM_CHANNELS - 1]; in ip22zilog_prepare()
1092 for (channel = NUM_CHANNELS - 1 ; channel > 0; channel--) in ip22zilog_prepare()
1134 for (channel = 0; channel < NUM_CHANNELS; channel++) { in ip22zilog_prepare()
1171 for (i = 0; i < NUM_CHANNELS; i++) { in ip22zilog_ports_init()
1195 for (i = 0; i < NUM_CHANNELS; i++) { in ip22zilog_exit()
/linux/drivers/edac/
A Dskx_common.h49 #define NUM_CHANNELS MAX(SKX_NUM_CHANNELS, I10NM_NUM_CHANNELS) macro
92 } chan[NUM_CHANNELS];
A Digen6_edac.c45 #define NUM_CHANNELS 2 /* Max channels */ macro
151 u64 dimm_s_size[NUM_CHANNELS];
152 u64 dimm_l_size[NUM_CHANNELS];
153 int dimm_l_map[NUM_CHANNELS];
812 for (i = 0; i < NUM_CHANNELS; i++) { in igen6_get_dimm_config()
879 for (i = 0; i < NUM_CHANNELS; i++) { in igen6_reg_dump()
1021 layers[0].size = NUM_CHANNELS; in igen6_register_mci()
A Dsb_edac.c286 #define NUM_CHANNELS 6 /* Max channels per MC */ macro
383 struct pci_dev *pci_tad[NUM_CHANNELS];
388 struct sbridge_channel channel[NUM_CHANNELS];
1586 : NUM_CHANNELS; in __populate_dimms()
1855 for (i = 0; i < NUM_CHANNELS; i++) { in get_memory_layout()
1875 for (i = 0; i < NUM_CHANNELS; i++) { in get_memory_layout()
2250 if (channel >= NUM_CHANNELS) { in get_memory_error_data_from_mce()
3073 first_channel = find_first_bit(&channel_mask, NUM_CHANNELS); in sbridge_mce_output_error()
3230 KNL_MAX_CHANNELS : NUM_CHANNELS; in sbridge_register_mci()
A Dskx_common.c451 layers[0].size = NUM_CHANNELS; in skx_register_mci()
709 for (j = 0; j < NUM_CHANNELS; j++) { in skx_remove()
/linux/drivers/net/wireless/intersil/orinoco/
A Dcfg.c59 for (i = 0; i < NUM_CHANNELS; i++) { in orinoco_wiphy_register()
183 if ((channel < 1) || (channel > NUM_CHANNELS) || in orinoco_set_monitor_channel()
A Dhw.h21 #define NUM_CHANNELS 14 macro
A Dhw.c1193 if ((channel < 1) || (channel > NUM_CHANNELS)) { in orinoco_hw_get_freq()
A Dwext.c450 if ((chan < 1) || (chan > NUM_CHANNELS) || in orinoco_ioctl_setfreq()
/linux/drivers/clk/berlin/
A Dberlin2-avpll.c29 #define NUM_CHANNELS 8 macro
/linux/drivers/net/ethernet/toshiba/
A Dps3_gelic_wireless.c52 #define NUM_CHANNELS ARRAY_SIZE(channel_freq) macro
315 i < NUM_CHANNELS && chs < IW_MAX_FREQUENCIES; i++) in gelic_wl_get_range()

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