Searched refs:PACKET3_CONTEXT_CONTROL (Results 1 – 20 of 20) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | si_enums.h | 192 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| A D | soc15d.h | 99 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| A D | nvd.h | 76 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| A D | vid.h | 131 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| A D | cikd.h | 249 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| A D | gfx_v7_0.c | 2338 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_ring_emit_cntxcntl()
2552 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_0_cp_gfx_start()
4000 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_0_get_csb_buffer()
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| A D | sid.h | 1687 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| A D | gfx_v6_0.c | 2888 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v6_0_get_csb_buffer()
2977 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v6_ring_emit_cntxcntl()
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| A D | gfx_v8_0.c | 1267 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_0_get_csb_buffer()
4205 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_0_cp_gfx_start()
6366 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_ring_emit_cntxcntl()
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| A D | gfx_v9_0.c | 1770 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_0_get_csb_buffer()
3287 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_0_cp_gfx_start()
5642 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_ring_emit_cntxcntl()
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| A D | gfx_v10_0.c | 4406 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v10_0_get_csb_buffer()
6234 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v10_0_cp_gfx_start()
8770 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v10_0_ring_emit_cntxcntl()
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| /linux/drivers/gpu/drm/radeon/ |
| A D | nid.h | 1179 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| A D | sid.h | 1624 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| A D | cikd.h | 1717 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| A D | evergreen_cs.c | 1826 case PACKET3_CONTEXT_CONTROL: in evergreen_packet3_check()
3376 case PACKET3_CONTEXT_CONTROL: in evergreen_vm_packet3_check()
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| A D | evergreend.h | 1564 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| A D | si.c | 4552 case PACKET3_CONTEXT_CONTROL: in si_vm_packet3_gfx_check()
4665 case PACKET3_CONTEXT_CONTROL: in si_vm_packet3_compute_check()
5724 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in si_get_csb_buffer()
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| A D | r600d.h | 1600 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| A D | r600_cs.c | 1690 case PACKET3_CONTEXT_CONTROL: in r600_packet3_check()
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| A D | cik.c | 3999 radeon_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in cik_cp_gfx_start()
6713 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in cik_get_csb_buffer()
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