Searched refs:PACKET3_SET_CONTEXT_REG (Results 1 – 20 of 20) sorted by relevance
/linux/drivers/gpu/drm/amd/amdgpu/ |
A D | si_enums.h | 262 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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A D | soc15d.h | 288 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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A D | nvd.h | 321 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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A D | vid.h | 342 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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A D | cikd.h | 460 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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A D | gfx_v7_0.c | 2560 PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v7_0_cp_gfx_start() 2568 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v7_0_cp_gfx_start() 2579 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v7_0_cp_gfx_start() 4008 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v7_0_get_csb_buffer() 4018 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v7_0_get_csb_buffer()
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A D | gfx_v6_0.c | 2062 PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v6_0_cp_gfx_start() 2076 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v6_0_cp_gfx_start() 2896 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v6_0_get_csb_buffer() 2906 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1)); in gfx_v6_0_get_csb_buffer()
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A D | sid.h | 1848 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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A D | gfx_v8_0.c | 1275 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v8_0_get_csb_buffer() 1286 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v8_0_get_csb_buffer() 4213 PACKET3(PACKET3_SET_CONTEXT_REG, in gfx_v8_0_cp_gfx_start() 4223 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v8_0_cp_gfx_start()
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A D | gfx_v10_0.c | 4414 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v10_0_get_csb_buffer() 4427 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1)); in gfx_v10_0_get_csb_buffer() 6242 PACKET3(PACKET3_SET_CONTEXT_REG, in gfx_v10_0_cp_gfx_start() 6254 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 1)); in gfx_v10_0_cp_gfx_start()
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A D | gfx_v9_0.c | 1778 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v9_0_get_csb_buffer() 3295 PACKET3(PACKET3_SET_CONTEXT_REG, in gfx_v9_0_cp_gfx_start()
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/linux/drivers/gpu/drm/radeon/ |
A D | nid.h | 1272 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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A D | si.c | 3604 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in si_cp_start() 4571 case PACKET3_SET_CONTEXT_REG: in si_vm_packet3_gfx_check() 4674 case PACKET3_SET_CONTEXT_REG: in si_vm_packet3_compute_check() 5732 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in si_get_csb_buffer() 5742 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1)); in si_get_csb_buffer()
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A D | sid.h | 1785 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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A D | cikd.h | 1928 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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A D | evergreen_cs.c | 2316 case PACKET3_SET_CONTEXT_REG: in evergreen_packet3_check() 3395 case PACKET3_SET_CONTEXT_REG: in evergreen_vm_packet3_check()
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A D | evergreend.h | 1668 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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A D | r600d.h | 1689 #define PACKET3_SET_CONTEXT_REG 0x69 macro
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A D | r600_cs.c | 1926 case PACKET3_SET_CONTEXT_REG: in r600_packet3_check()
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A D | cik.c | 4013 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in cik_cp_gfx_start() 6721 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in cik_get_csb_buffer() 6731 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in cik_get_csb_buffer()
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