Home
last modified time | relevance | path

Searched refs:RA (Results 1 – 25 of 31) sorted by relevance

12

/linux/arch/x86/crypto/
A Dserpent-sse2-i586-asm_32.S27 #define RA %xmm0 macro
516 S0(RA, RB, RC, RD, RE); LK(RC, RB, RD, RA, RE, 1);
517 S1(RC, RB, RD, RA, RE); LK(RE, RD, RA, RC, RB, 2);
518 S2(RE, RD, RA, RC, RB); LK(RB, RD, RE, RC, RA, 3);
519 S3(RB, RD, RE, RC, RA); LK(RC, RA, RD, RB, RE, 4);
520 S4(RC, RA, RD, RB, RE); LK(RA, RD, RB, RE, RC, 5);
521 S5(RA, RD, RB, RE, RC); LK(RC, RA, RD, RE, RB, 6);
522 S6(RC, RA, RD, RE, RB); LK(RD, RB, RA, RE, RC, 7);
523 S7(RD, RB, RA, RE, RC); LK(RC, RA, RE, RD, RB, 8);
524 S0(RC, RA, RE, RD, RB); LK(RE, RA, RD, RC, RB, 9);
[all …]
A Dserpent-sse2-x86_64-asm_64.S637 S(S0, RA, RB, RC, RD, RE); LK2(RC, RB, RD, RA, RE, 1);
638 S(S1, RC, RB, RD, RA, RE); LK2(RE, RD, RA, RC, RB, 2);
639 S(S2, RE, RD, RA, RC, RB); LK2(RB, RD, RE, RC, RA, 3);
640 S(S3, RB, RD, RE, RC, RA); LK2(RC, RA, RD, RB, RE, 4);
641 S(S4, RC, RA, RD, RB, RE); LK2(RA, RD, RB, RE, RC, 5);
642 S(S5, RA, RD, RB, RE, RC); LK2(RC, RA, RD, RE, RB, 6);
643 S(S6, RC, RA, RD, RE, RB); LK2(RD, RB, RA, RE, RC, 7);
644 S(S7, RD, RB, RA, RE, RC); LK2(RC, RA, RE, RD, RB, 8);
645 S(S0, RC, RA, RE, RD, RB); LK2(RE, RA, RD, RC, RB, 9);
646 S(S1, RE, RA, RD, RC, RB); LK2(RB, RD, RC, RE, RA, 10);
[all …]
A Dserpent-avx-x86_64-asm_64.S568 S(S0, RA, RB, RC, RD, RE); LK2(RC, RB, RD, RA, RE, 1);
569 S(S1, RC, RB, RD, RA, RE); LK2(RE, RD, RA, RC, RB, 2);
570 S(S2, RE, RD, RA, RC, RB); LK2(RB, RD, RE, RC, RA, 3);
571 S(S3, RB, RD, RE, RC, RA); LK2(RC, RA, RD, RB, RE, 4);
572 S(S4, RC, RA, RD, RB, RE); LK2(RA, RD, RB, RE, RC, 5);
573 S(S5, RA, RD, RB, RE, RC); LK2(RC, RA, RD, RE, RB, 6);
574 S(S6, RC, RA, RD, RE, RB); LK2(RD, RB, RA, RE, RC, 7);
575 S(S7, RD, RB, RA, RE, RC); LK2(RC, RA, RE, RD, RB, 8);
576 S(S0, RC, RA, RE, RD, RB); LK2(RE, RA, RD, RC, RB, 9);
577 S(S1, RE, RA, RD, RC, RB); LK2(RB, RD, RC, RE, RA, 10);
[all …]
A Dserpent-avx2-asm_64.S568 S(S0, RA, RB, RC, RD, RE); LK2(RC, RB, RD, RA, RE, 1);
569 S(S1, RC, RB, RD, RA, RE); LK2(RE, RD, RA, RC, RB, 2);
570 S(S2, RE, RD, RA, RC, RB); LK2(RB, RD, RE, RC, RA, 3);
571 S(S3, RB, RD, RE, RC, RA); LK2(RC, RA, RD, RB, RE, 4);
572 S(S4, RC, RA, RD, RB, RE); LK2(RA, RD, RB, RE, RC, 5);
573 S(S5, RA, RD, RB, RE, RC); LK2(RC, RA, RD, RE, RB, 6);
574 S(S6, RC, RA, RD, RE, RB); LK2(RD, RB, RA, RE, RC, 7);
575 S(S7, RD, RB, RA, RE, RC); LK2(RC, RA, RE, RD, RB, 8);
576 S(S0, RC, RA, RE, RD, RB); LK2(RE, RA, RD, RC, RB, 9);
577 S(S1, RE, RA, RD, RC, RB); LK2(RB, RD, RC, RE, RA, 10);
[all …]
A Dtwofish-avx-x86_64-asm_64.S189 encrypt_round((2*n), RA, RB, RC, RD, preload_rgi, rotate_1l); \
190 encrypt_round(((2*n) + 1), RC, RD, RA, RB, preload_rgi, rotate_1l);
193 encrypt_round((2*n), RA, RB, RC, RD, preload_rgi, rotate_1l); \
194 encrypt_round(((2*n) + 1), RC, RD, RA, RB, dummy, dummy);
197 decrypt_round(((2*n) + 1), RC, RD, RA, RB, preload_rgi, rotate_1l); \
198 decrypt_round((2*n), RA, RB, RC, RD, preload_rgi, rotate_1l);
201 decrypt_round(((2*n) + 1), RC, RD, RA, RB, preload_rgi, rotate_1l); \
202 decrypt_round((2*n), RA, RB, RC, RD, dummy, dummy);
A Dcast6-avx-x86_64-asm_64.S159 qop(RB, RA, 3); \
162 qop(RA, RD, 1);
166 qop(RA, RD, 1); \
169 qop(RB, RA, 3); \
A Dsha1_avx2_x86_64_asm.S108 .set RA, REG_RA define
336 .set RTB, RA
337 .set RA, T_REG define
/linux/drivers/media/platform/coda/
A Dcoda-gdi.c92 RBC(RA, 0, RA, 1),
93 RBC(RA, 1, RA, 2),
94 RBC(RA, 2, RA, 3),
95 RBC(RA, 3, RA, 4),
96 RBC(RA, 4, RA, 5),
97 RBC(RA, 5, RA, 6),
98 RBC(RA, 6, RA, 7),
99 RBC(RA, 7, RA, 8),
100 RBC(RA, 8, RA, 9),
101 RBC(RA, 9, RA, 10),
[all …]
/linux/arch/powerpc/xmon/
A Dppc-opc.c502 #define RA NSISIGNOPT + 1 macro
507 #define RA0 RA + 1
4692 {"tw", X(31,4), X_MASK, PPCCOM, 0, {TO, RA, RB}},
4693 {"t", X(31,4), X_MASK, PWRCOM, 0, {TO, RA, RB}},
4833 {"td", X(31,68), X_MASK, PPC64, 0, {TO, RA, RB}},
4879 {"clf", X(31,118), XTO_MASK, POWER, 0, {RA, RB}},
5071 {"icbt", X(31,262), XRT_MASK, PPC403, 0, {RA, RB}},
5724 {"dsn", X(31,483), XRT_MASK, E500MC, 0, {RA, RB}},
5746 {"cli", X(31,502), XRB_MASK, POWER, 0, {RT, RA}},
5776 {"clcs", X(31,531), XRB_MASK, M601, 0, {RT, RA}},
[all …]
/linux/arch/powerpc/crypto/
A Dsha1-powerpc-asm.S27 #define RA(t) ((((t)+4)%6)+7) macro
42 rotlwi RT(t),RA(t),5; \
54 rotlwi RT(t),RA(t),5; \
68 rotlwi RT(t),RA(t),5; \
78 rotlwi RT(t),RA(t),5; \
93 rotlwi RT(t),RA(t),5; \
132 lwz RA(0),0(r3) /* A */
179 add RA(0),RA(80),r16
181 stw RA(0),0(r3)
/linux/tools/testing/selftests/powerpc/include/
A Dinstructions.h9 #define __COPY(RA, RB, L) \ argument
10 (0x7c00060c | (RA) << (31-15) | (RB) << (31-20) | (L) << (31-10))
11 #define COPY(RA, RB, L) \ argument
12 .long __COPY((RA), (RB), (L))
33 #define __PASTE(RA, RB, L, RC) \ argument
34 (0x7c00070c | (RA) << (31-15) | (RB) << (31-20) | (L) << (31-10) | (RC) << (31-31))
35 #define PASTE(RA, RB, L, RC) \ argument
36 .long __PASTE((RA), (RB), (L), (RC))
/linux/arch/powerpc/kvm/
A Dbook3s_32_sr.S92 #define KVM_LOAD_BAT(n, reg, RA, RB) \ argument
93 lwz RA,(n*16)+0(reg); \
95 mtspr SPRN_IBAT##n##U,RA; \
97 lwz RA,(n*16)+8(reg); \
99 mtspr SPRN_DBAT##n##U,RA; \
/linux/Documentation/devicetree/bindings/soc/ti/
A Dk3-ringacc.yaml15 The Ring Accelerator (RA) is a machine which converts read/write accesses
17 circular data structure in memory. The RA eliminates the need for each DMA
21 source interface on the RA) and the RA replaces the address for the transaction
26 management of the packet queues. The K3 SoCs can have more than one RA instances
51 description: Number of rings supported by RA
/linux/arch/mips/kvm/
A Dentry.c51 #define RA 31 macro
321 uasm_i_jalr(&p, RA, T9); in kvm_mips_build_enter_guest()
702 uasm_i_jalr(&p, RA, T9); in kvm_mips_build_exit()
771 uasm_i_jalr(&p, RA, T9); in kvm_mips_build_exit()
910 UASM_i_LW(&p, RA, offsetof(struct pt_regs, regs[RA]), K1); in kvm_mips_build_ret_to_host()
911 uasm_i_jr(&p, RA); in kvm_mips_build_ret_to_host()
/linux/drivers/net/ethernet/intel/ixgb/
A Dixgb_hw.c388 IXGB_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0); in ixgb_init_rx_addrs()
389 IXGB_WRITE_REG_ARRAY(hw, RA, (i << 1), 0); in ixgb_init_rx_addrs()
425 IXGB_WRITE_REG_ARRAY(hw, RA, (i << 1), 0); in ixgb_mc_addr_list_update()
426 IXGB_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0); in ixgb_mc_addr_list_update()
571 IXGB_WRITE_REG_ARRAY(hw, RA, (index << 1), rar_low); in ixgb_rar_set()
572 IXGB_WRITE_REG_ARRAY(hw, RA, ((index << 1) + 1), rar_high); in ixgb_rar_set()
/linux/arch/powerpc/kernel/
A Dhead_book3s_32.S38 #define LOAD_BAT(n, reg, RA, RB) \ argument
40 li RA,0; \
41 mtspr SPRN_IBAT##n##U,RA; \
42 mtspr SPRN_DBAT##n##U,RA; \
43 lwz RA,(n*16)+0(reg); \
45 mtspr SPRN_IBAT##n##U,RA; \
47 lwz RA,(n*16)+8(reg); \
49 mtspr SPRN_DBAT##n##U,RA; \
/linux/arch/nds32/mm/
A Dalignment.c19 #define RA(inst) (((inst) >> 15) & 0x1FUL) macro
318 unaligned_addr = *idx_to_addr(regs, RA(inst)); in do_32()
502 *idx_to_addr(regs, RA(inst)) = unaligned_addr + shift; in do_32()
/linux/drivers/pwm/
A Dpwm-atmel-tcb.c115 ATMEL_TC_REG(tcbpwmc->channel, RA), in atmel_tcb_pwm_request()
272 ATMEL_TC_REG(tcbpwmc->channel, RA), in atmel_tcb_pwm_enable()
530 regmap_read(tcbpwm->regmap, ATMEL_TC_REG(channel, RA), &chan->ra); in atmel_tcb_pwm_suspend()
544 regmap_write(tcbpwm->regmap, ATMEL_TC_REG(channel, RA), chan->ra); in atmel_tcb_pwm_resume()
/linux/tools/perf/arch/riscv/util/
A Dunwind-libdw.c22 dwarf_regs[1] = REG(RA); in libdw__arch_set_initial_registers()
/linux/arch/mips/mm/
A Dpage.c49 #define RA 31 macro
351 uasm_i_jr(&buf, RA); in build_clear_page()
597 uasm_i_jr(&buf, RA); in build_copy_page()
/linux/tools/testing/selftests/powerpc/copyloops/
A Dmemcpy_power7.S16 #define LVS(VRT,RA,RB) lvsl VRT,RA,RB argument
19 #define LVS(VRT,RA,RB) lvsr VRT,RA,RB argument
A Dcopyuser_power7.S16 #define LVS(VRT,RA,RB) lvsl VRT,RA,RB argument
19 #define LVS(VRT,RA,RB) lvsr VRT,RA,RB argument
/linux/arch/powerpc/lib/
A Dmemcpy_power7.S16 #define LVS(VRT,RA,RB) lvsl VRT,RA,RB argument
19 #define LVS(VRT,RA,RB) lvsr VRT,RA,RB argument
A Dcopyuser_power7.S16 #define LVS(VRT,RA,RB) lvsl VRT,RA,RB argument
19 #define LVS(VRT,RA,RB) lvsr VRT,RA,RB argument
/linux/drivers/clocksource/
A Dtimer-atmel-tcb.c96 writel(0, tcaddr + ATMEL_TC_REG(i, RA)); in tc_clksrc_resume()
321 writel(0x0000, tcaddr + ATMEL_TC_REG(0, RA)); in tcb_setup_dual_chan()

Completed in 78 milliseconds

12