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Searched refs:TIMER_ENABLE (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/clocksource/
A Dtimer-qcom.c24 #define TIMER_ENABLE 0x0008 macro
42 u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); in msm_timer_interrupt()
44 writel_relaxed(ctrl, event_base + TIMER_ENABLE); in msm_timer_interrupt()
53 u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); in msm_timer_set_next_event()
56 writel_relaxed(ctrl, event_base + TIMER_ENABLE); in msm_timer_set_next_event()
65 writel_relaxed(ctrl | TIMER_ENABLE_EN, event_base + TIMER_ENABLE); in msm_timer_set_next_event()
73 ctrl = readl_relaxed(event_base + TIMER_ENABLE); in msm_timer_shutdown()
75 writel_relaxed(ctrl, event_base + TIMER_ENABLE); in msm_timer_shutdown()
186 writel_relaxed(TIMER_ENABLE_EN, source_base + TIMER_ENABLE); in msm_timer_init()
A Dtimer-oxnas-rps.c39 #define TIMER_ENABLE BIT(7) macro
78 cfg |= TIMER_ENABLE; in oxnas_rps_timer_config()
192 writel_relaxed(TIMER_PERIODIC | TIMER_ENABLE | TIMER_DIV16, in oxnas_rps_clocksource_init()
A Dtimer-rockchip.c28 #define TIMER_ENABLE 0x1 macro
62 writel_relaxed(TIMER_ENABLE | flags, timer->ctrl); in rk_timer_enable()
/linux/arch/hexagon/kernel/
A Dtime.c22 #define TIMER_ENABLE BIT(0) macro
91 iowrite32(TIMER_ENABLE, &rtos_timer->enable); in set_next_event()

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