Searched refs:VIVS_MMUv2_AHB_CONTROL (Results 1 – 2 of 2) sorted by relevance
402 #define VIVS_MMUv2_AHB_CONTROL 0x000003a8 macro
511 gpu_write(gpu, VIVS_MMUv2_AHB_CONTROL, in etnaviv_hw_reset()737 u32 val = gpu_read(gpu, VIVS_MMUv2_AHB_CONTROL); in etnaviv_gpu_hw_init()739 gpu_write(gpu, VIVS_MMUv2_AHB_CONTROL, val); in etnaviv_gpu_hw_init()
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