/linux/drivers/gpu/drm/amd/amdgpu/ |
A D | jpeg_v1_0.c | 182 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_insert_start() 201 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_insert_end() 226 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence() 230 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence() 234 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence() 238 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence() 242 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence() 246 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence() 250 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence() 254 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence() [all …]
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A D | jpeg_v2_0.c | 487 amdgpu_ring_write(ring, seq); in jpeg_v2_0_dec_ring_emit_fence() 491 amdgpu_ring_write(ring, seq); in jpeg_v2_0_dec_ring_emit_fence() 503 amdgpu_ring_write(ring, 0x8); in jpeg_v2_0_dec_ring_emit_fence() 507 amdgpu_ring_write(ring, 0); in jpeg_v2_0_dec_ring_emit_fence() 518 amdgpu_ring_write(ring, 0); in jpeg_v2_0_dec_ring_emit_fence() 567 amdgpu_ring_write(ring, 0); in jpeg_v2_0_dec_ring_emit_ib() 598 amdgpu_ring_write(ring, 0); in jpeg_v2_0_dec_ring_emit_reg_wait() 599 amdgpu_ring_write(ring, in jpeg_v2_0_dec_ring_emit_reg_wait() 631 amdgpu_ring_write(ring, 0); in jpeg_v2_0_dec_ring_emit_wreg() 632 amdgpu_ring_write(ring, in jpeg_v2_0_dec_ring_emit_wreg() [all …]
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A D | uvd_v6_0.c | 486 amdgpu_ring_write(ring, tmp); in uvd_v6_0_hw_init() 490 amdgpu_ring_write(ring, tmp); in uvd_v6_0_hw_init() 494 amdgpu_ring_write(ring, tmp); in uvd_v6_0_hw_init() 499 amdgpu_ring_write(ring, 0x8); in uvd_v6_0_hw_init() 502 amdgpu_ring_write(ring, 3); in uvd_v6_0_hw_init() 931 amdgpu_ring_write(ring, 0); in uvd_v6_0_ring_emit_fence() 934 amdgpu_ring_write(ring, 0); in uvd_v6_0_ring_emit_fence() 936 amdgpu_ring_write(ring, 0); in uvd_v6_0_ring_emit_fence() 938 amdgpu_ring_write(ring, 2); in uvd_v6_0_ring_emit_fence() 1079 amdgpu_ring_write(ring, 0); in uvd_v6_0_ring_emit_vm_flush() [all …]
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A D | uvd_v5_0.c | 174 amdgpu_ring_write(ring, tmp); in uvd_v5_0_hw_init() 178 amdgpu_ring_write(ring, tmp); in uvd_v5_0_hw_init() 182 amdgpu_ring_write(ring, tmp); in uvd_v5_0_hw_init() 187 amdgpu_ring_write(ring, 0x8); in uvd_v5_0_hw_init() 190 amdgpu_ring_write(ring, 3); in uvd_v5_0_hw_init() 494 amdgpu_ring_write(ring, seq); in uvd_v5_0_ring_emit_fence() 500 amdgpu_ring_write(ring, 0); in uvd_v5_0_ring_emit_fence() 503 amdgpu_ring_write(ring, 0); in uvd_v5_0_ring_emit_fence() 505 amdgpu_ring_write(ring, 0); in uvd_v5_0_ring_emit_fence() 507 amdgpu_ring_write(ring, 2); in uvd_v5_0_ring_emit_fence() [all …]
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A D | uvd_v3_1.c | 116 amdgpu_ring_write(ring, seq); in uvd_v3_1_ring_emit_fence() 122 amdgpu_ring_write(ring, 0); in uvd_v3_1_ring_emit_fence() 125 amdgpu_ring_write(ring, 0); in uvd_v3_1_ring_emit_fence() 127 amdgpu_ring_write(ring, 0); in uvd_v3_1_ring_emit_fence() 129 amdgpu_ring_write(ring, 2); in uvd_v3_1_ring_emit_fence() 175 amdgpu_ring_write(ring, 0); in uvd_v3_1_ring_insert_nop() 663 amdgpu_ring_write(ring, tmp); in uvd_v3_1_hw_init() 667 amdgpu_ring_write(ring, tmp); in uvd_v3_1_hw_init() 671 amdgpu_ring_write(ring, tmp); in uvd_v3_1_hw_init() 676 amdgpu_ring_write(ring, 0x8); in uvd_v3_1_hw_init() [all …]
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A D | uvd_v4_2.c | 177 amdgpu_ring_write(ring, tmp); in uvd_v4_2_hw_init() 181 amdgpu_ring_write(ring, tmp); in uvd_v4_2_hw_init() 185 amdgpu_ring_write(ring, tmp); in uvd_v4_2_hw_init() 190 amdgpu_ring_write(ring, 0x8); in uvd_v4_2_hw_init() 193 amdgpu_ring_write(ring, 3); in uvd_v4_2_hw_init() 478 amdgpu_ring_write(ring, seq); in uvd_v4_2_ring_emit_fence() 484 amdgpu_ring_write(ring, 0); in uvd_v4_2_ring_emit_fence() 487 amdgpu_ring_write(ring, 0); in uvd_v4_2_ring_emit_fence() 489 amdgpu_ring_write(ring, 0); in uvd_v4_2_ring_emit_fence() 491 amdgpu_ring_write(ring, 2); in uvd_v4_2_ring_emit_fence() [all …]
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A D | sdma_v2_4.c | 236 amdgpu_ring_write(ring, ring->funcs->nop | in sdma_v2_4_ring_insert_nop() 239 amdgpu_ring_write(ring, ring->funcs->nop); in sdma_v2_4_ring_insert_nop() 267 amdgpu_ring_write(ring, ib->length_dw); in sdma_v2_4_ring_emit_ib() 268 amdgpu_ring_write(ring, 0); in sdma_v2_4_ring_emit_ib() 269 amdgpu_ring_write(ring, 0); in sdma_v2_4_ring_emit_ib() 320 amdgpu_ring_write(ring, lower_32_bits(seq)); in sdma_v2_4_ring_emit_fence() 575 amdgpu_ring_write(ring, 0xDEADBEEF); in sdma_v2_4_ring_test_ring() 814 amdgpu_ring_write(ring, 0); in sdma_v2_4_ring_emit_vm_flush() 816 amdgpu_ring_write(ring, 0); /* mask */ in sdma_v2_4_ring_emit_vm_flush() 826 amdgpu_ring_write(ring, reg); in sdma_v2_4_ring_emit_wreg() [all …]
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A D | uvd_v7_0.c | 1181 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_fence() 1184 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_fence() 1187 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_fence() 1190 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_fence() 1194 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_fence() 1197 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_fence() 1200 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_fence() 1257 amdgpu_ring_write(ring, in uvd_v7_0_ring_test_ring() 1321 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_ib() 1325 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_ib() [all …]
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A D | si_dma.c | 99 amdgpu_ring_write(ring, addr & 0xfffffffc); in si_dma_ring_emit_fence() 101 amdgpu_ring_write(ring, seq); in si_dma_ring_emit_fence() 106 amdgpu_ring_write(ring, addr & 0xfffffffc); in si_dma_ring_emit_fence() 108 amdgpu_ring_write(ring, upper_32_bits(seq)); in si_dma_ring_emit_fence() 227 amdgpu_ring_write(ring, 0xDEADBEEF); in si_dma_ring_test_ring() 432 amdgpu_ring_write(ring, lower_32_bits(addr)); in si_dma_ring_emit_pipeline_sync() 435 amdgpu_ring_write(ring, seq); /* value */ in si_dma_ring_emit_pipeline_sync() 458 amdgpu_ring_write(ring, 1 << vmid); /* mask */ in si_dma_ring_emit_vm_flush() 459 amdgpu_ring_write(ring, 0); /* value */ in si_dma_ring_emit_vm_flush() 467 amdgpu_ring_write(ring, (0xf << 16) | reg); in si_dma_ring_emit_wreg() [all …]
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A D | cik_sdma.c | 208 amdgpu_ring_write(ring, ring->funcs->nop | in cik_sdma_ring_insert_nop() 211 amdgpu_ring_write(ring, ring->funcs->nop); in cik_sdma_ring_insert_nop() 238 amdgpu_ring_write(ring, ib->length_dw); in cik_sdma_ring_emit_ib() 288 amdgpu_ring_write(ring, lower_32_bits(seq)); in cik_sdma_ring_emit_fence() 640 amdgpu_ring_write(ring, 0xDEADBEEF); in cik_sdma_ring_test_ring() 847 amdgpu_ring_write(ring, addr & 0xfffffffc); in cik_sdma_ring_emit_pipeline_sync() 874 amdgpu_ring_write(ring, 0); in cik_sdma_ring_emit_vm_flush() 875 amdgpu_ring_write(ring, 0); /* reference */ in cik_sdma_ring_emit_vm_flush() 876 amdgpu_ring_write(ring, 0); /* mask */ in cik_sdma_ring_emit_vm_flush() 884 amdgpu_ring_write(ring, reg); in cik_sdma_ring_emit_wreg() [all …]
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A D | vcn_v1_0.c | 1426 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_insert_start() 1429 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_insert_start() 1445 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_insert_end() 1467 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_emit_fence() 1470 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_emit_fence() 1473 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_emit_fence() 1476 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_emit_fence() 1480 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_emit_fence() 1483 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_emit_fence() 1486 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_emit_fence() [all …]
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A D | vcn_v2_0.c | 1373 amdgpu_ring_write(ring, 0); in vcn_v2_0_dec_ring_insert_start() 1410 amdgpu_ring_write(ring, 0); in vcn_v2_0_dec_ring_insert_nop() 1431 amdgpu_ring_write(ring, seq); in vcn_v2_0_dec_ring_emit_fence() 1443 amdgpu_ring_write(ring, 0); in vcn_v2_0_dec_ring_emit_fence() 1446 amdgpu_ring_write(ring, 0); in vcn_v2_0_dec_ring_emit_fence() 1472 amdgpu_ring_write(ring, vmid); in vcn_v2_0_dec_ring_emit_ib() 1491 amdgpu_ring_write(ring, val); in vcn_v2_0_dec_ring_emit_reg_wait() 1525 amdgpu_ring_write(ring, val); in vcn_v2_0_dec_ring_emit_wreg() 1619 amdgpu_ring_write(ring, seq); in vcn_v2_0_enc_ring_emit_fence() 1658 amdgpu_ring_write(ring, val); in vcn_v2_0_enc_ring_emit_reg_wait() [all …]
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A D | sdma_v5_2.c | 209 amdgpu_ring_write(ring, 1); in sdma_v5_2_ring_init_cond_exec() 323 amdgpu_ring_write(ring, ring->funcs->nop | in sdma_v5_2_ring_insert_nop() 326 amdgpu_ring_write(ring, ring->funcs->nop); in sdma_v5_2_ring_insert_nop() 362 amdgpu_ring_write(ring, ib->length_dw); in sdma_v5_2_ring_emit_ib() 443 amdgpu_ring_write(ring, lower_32_bits(seq)); in sdma_v5_2_ring_emit_fence() 934 amdgpu_ring_write(ring, 0xDEADBEEF); in sdma_v5_2_ring_test_ring() 1188 amdgpu_ring_write(ring, reg); in sdma_v5_2_ring_emit_wreg() 1189 amdgpu_ring_write(ring, val); in sdma_v5_2_ring_emit_wreg() 1198 amdgpu_ring_write(ring, reg << 2); in sdma_v5_2_ring_emit_reg_wait() 1199 amdgpu_ring_write(ring, 0); in sdma_v5_2_ring_emit_reg_wait() [all …]
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A D | sdma_v3_0.c | 410 amdgpu_ring_write(ring, ring->funcs->nop | in sdma_v3_0_ring_insert_nop() 413 amdgpu_ring_write(ring, ring->funcs->nop); in sdma_v3_0_ring_insert_nop() 441 amdgpu_ring_write(ring, ib->length_dw); in sdma_v3_0_ring_emit_ib() 442 amdgpu_ring_write(ring, 0); in sdma_v3_0_ring_emit_ib() 443 amdgpu_ring_write(ring, 0); in sdma_v3_0_ring_emit_ib() 494 amdgpu_ring_write(ring, lower_32_bits(seq)); in sdma_v3_0_ring_emit_fence() 847 amdgpu_ring_write(ring, 0xDEADBEEF); in sdma_v3_0_ring_test_ring() 1085 amdgpu_ring_write(ring, 0); in sdma_v3_0_ring_emit_vm_flush() 1087 amdgpu_ring_write(ring, 0); /* mask */ in sdma_v3_0_ring_emit_vm_flush() 1097 amdgpu_ring_write(ring, reg); in sdma_v3_0_ring_emit_wreg() [all …]
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A D | gfx_v7_0.c | 2280 amdgpu_ring_write(ring, in gfx_v7_0_ring_emit_ib_gfx() 2314 amdgpu_ring_write(ring, in gfx_v7_0_ring_emit_ib_compute() 2340 amdgpu_ring_write(ring, 0); in gfx_v7_ring_emit_cntxcntl() 2559 amdgpu_ring_write(ring, in gfx_v7_0_cp_gfx_start() 2577 amdgpu_ring_write(ring, 0); in gfx_v7_0_cp_gfx_start() 3260 amdgpu_ring_write(ring, 0); in gfx_v7_0_ring_emit_vm_flush() 3288 amdgpu_ring_write(ring, 0); in gfx_v7_0_ring_emit_wreg() 4118 amdgpu_ring_write(ring, 0); in gfx_v7_0_ring_emit_gds_switch() 4126 amdgpu_ring_write(ring, 0); in gfx_v7_0_ring_emit_gds_switch() 4134 amdgpu_ring_write(ring, 0); in gfx_v7_0_ring_emit_gds_switch() [all …]
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A D | sdma_v5_0.c | 322 amdgpu_ring_write(ring, 1); in sdma_v5_0_ring_init_cond_exec() 436 amdgpu_ring_write(ring, ring->funcs->nop | in sdma_v5_0_ring_insert_nop() 439 amdgpu_ring_write(ring, ring->funcs->nop); in sdma_v5_0_ring_insert_nop() 475 amdgpu_ring_write(ring, ib->length_dw); in sdma_v5_0_ring_emit_ib() 1012 amdgpu_ring_write(ring, 0xDEADBEEF); in sdma_v5_0_ring_test_ring() 1236 amdgpu_ring_write(ring, addr & 0xfffffffc); in sdma_v5_0_ring_emit_pipeline_sync() 1266 amdgpu_ring_write(ring, reg); in sdma_v5_0_ring_emit_wreg() 1267 amdgpu_ring_write(ring, val); in sdma_v5_0_ring_emit_wreg() 1276 amdgpu_ring_write(ring, reg << 2); in sdma_v5_0_ring_emit_reg_wait() 1277 amdgpu_ring_write(ring, 0); in sdma_v5_0_ring_emit_reg_wait() [all …]
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A D | gfx_v8_0.c | 4212 amdgpu_ring_write(ring, in gfx_v8_0_cp_gfx_start() 4215 amdgpu_ring_write(ring, in gfx_v8_0_cp_gfx_start() 4232 amdgpu_ring_write(ring, 0); in gfx_v8_0_cp_gfx_start() 5207 amdgpu_ring_write(ring, 0); in gfx_v8_0_ring_emit_gds_switch() 5215 amdgpu_ring_write(ring, 0); in gfx_v8_0_ring_emit_gds_switch() 5223 amdgpu_ring_write(ring, 0); in gfx_v8_0_ring_emit_gds_switch() 5231 amdgpu_ring_write(ring, 0); in gfx_v8_0_ring_emit_gds_switch() 6149 amdgpu_ring_write(ring, in gfx_v8_0_ring_emit_ib_gfx() 6183 amdgpu_ring_write(ring, in gfx_v8_0_ring_emit_ib_compute() 6259 amdgpu_ring_write(ring, 0); in gfx_v8_0_ring_emit_vm_flush() [all …]
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A D | gfx_v6_0.c | 1842 amdgpu_ring_write(ring, 0); in gfx_v6_0_ring_emit_fence() 1849 amdgpu_ring_write(ring, 0); in gfx_v6_0_ring_emit_fence() 1873 amdgpu_ring_write(ring, 0); in gfx_v6_0_ring_emit_ib() 1884 amdgpu_ring_write(ring, in gfx_v6_0_ring_emit_ib() 2038 amdgpu_ring_write(ring, 0); in gfx_v6_0_cp_gfx_start() 2039 amdgpu_ring_write(ring, 0); in gfx_v6_0_cp_gfx_start() 2061 amdgpu_ring_write(ring, in gfx_v6_0_cp_gfx_start() 2074 amdgpu_ring_write(ring, 0); in gfx_v6_0_cp_gfx_start() 2340 amdgpu_ring_write(ring, 0); in gfx_v6_0_ring_emit_vm_flush() 2367 amdgpu_ring_write(ring, 0); in gfx_v6_0_ring_emit_wreg() [all …]
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A D | gfx_v9_0.c | 835 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_set_resources() 839 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_set_resources() 841 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_set_resources() 872 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_map_queues() 893 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_unmap_queues() 915 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_query_status() 920 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_query_status() 934 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_invalidate_tlbs() 1048 amdgpu_ring_write(ring, in gfx_v9_0_wait_reg_mem() 5400 amdgpu_ring_write(ring, in gfx_v9_0_ring_emit_ib_gfx() [all …]
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A D | vce_v3_0.c | 869 amdgpu_ring_write(ring, VCE_CMD_IB_VM); in vce_v3_0_ring_emit_ib() 870 amdgpu_ring_write(ring, vmid); in vce_v3_0_ring_emit_ib() 873 amdgpu_ring_write(ring, ib->length_dw); in vce_v3_0_ring_emit_ib() 879 amdgpu_ring_write(ring, VCE_CMD_UPDATE_PTB); in vce_v3_0_emit_vm_flush() 880 amdgpu_ring_write(ring, vmid); in vce_v3_0_emit_vm_flush() 881 amdgpu_ring_write(ring, pd_addr >> 12); in vce_v3_0_emit_vm_flush() 883 amdgpu_ring_write(ring, VCE_CMD_FLUSH_TLB); in vce_v3_0_emit_vm_flush() 884 amdgpu_ring_write(ring, vmid); in vce_v3_0_emit_vm_flush() 885 amdgpu_ring_write(ring, VCE_CMD_END); in vce_v3_0_emit_vm_flush() 893 amdgpu_ring_write(ring, VCE_CMD_WAIT_GE); in vce_v3_0_emit_pipeline_sync() [all …]
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A D | vce_v4_0.c | 988 amdgpu_ring_write(ring, VCE_CMD_IB_VM); in vce_v4_0_ring_emit_ib() 989 amdgpu_ring_write(ring, vmid); in vce_v4_0_ring_emit_ib() 1001 amdgpu_ring_write(ring, addr); in vce_v4_0_ring_emit_fence() 1003 amdgpu_ring_write(ring, seq); in vce_v4_0_ring_emit_fence() 1004 amdgpu_ring_write(ring, VCE_CMD_TRAP); in vce_v4_0_ring_emit_fence() 1009 amdgpu_ring_write(ring, VCE_CMD_END); in vce_v4_0_ring_insert_end() 1016 amdgpu_ring_write(ring, reg << 2); in vce_v4_0_emit_reg_wait() 1017 amdgpu_ring_write(ring, mask); in vce_v4_0_emit_reg_wait() 1018 amdgpu_ring_write(ring, val); in vce_v4_0_emit_reg_wait() 1038 amdgpu_ring_write(ring, reg << 2); in vce_v4_0_emit_wreg() [all …]
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A D | sdma_v4_0.c | 889 amdgpu_ring_write(ring, ib->length_dw); in sdma_v4_0_ring_emit_ib() 890 amdgpu_ring_write(ring, 0); in sdma_v4_0_ring_emit_ib() 891 amdgpu_ring_write(ring, 0); in sdma_v4_0_ring_emit_ib() 907 amdgpu_ring_write(ring, addr0); in sdma_v4_0_wait_reg_mem() 908 amdgpu_ring_write(ring, addr1); in sdma_v4_0_wait_reg_mem() 911 amdgpu_ring_write(ring, addr0 << 2); in sdma_v4_0_wait_reg_mem() 912 amdgpu_ring_write(ring, addr1 << 2); in sdma_v4_0_wait_reg_mem() 915 amdgpu_ring_write(ring, mask); /* mask */ in sdma_v4_0_wait_reg_mem() 1589 amdgpu_ring_write(ring, 0xDEADBEEF); in sdma_v4_0_ring_test_ring() 1827 amdgpu_ring_write(ring, reg); in sdma_v4_0_ring_emit_wreg() [all …]
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A D | gfx_v10_0.c | 3644 amdgpu_ring_write(kiq_ring, in gfx10_kiq_unmap_queues() 3666 amdgpu_ring_write(kiq_ring, in gfx10_kiq_query_status() 3684 amdgpu_ring_write(kiq_ring, in gfx10_kiq_invalidate_tlbs() 3817 amdgpu_ring_write(ring, 0); in gfx_v10_0_write_data_to_reg() 3827 amdgpu_ring_write(ring, in gfx_v10_0_wait_reg_mem() 6241 amdgpu_ring_write(ring, in gfx_v10_0_cp_gfx_start() 6262 amdgpu_ring_write(ring, 0); in gfx_v10_0_cp_gfx_start() 8608 amdgpu_ring_write(ring, in gfx_v10_0_ring_emit_ib_gfx() 8643 amdgpu_ring_write(ring, in gfx_v10_0_ring_emit_ib_compute() 8682 amdgpu_ring_write(ring, 0); in gfx_v10_0_ring_emit_fence() [all …]
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A D | jpeg_v2_5.c | 435 amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET, in jpeg_v2_6_dec_ring_insert_start() 437 amdgpu_ring_write(ring, 0x6aa04); /* PCTL0_MMHUB_DEEPSLEEP_IB */ in jpeg_v2_6_dec_ring_insert_start() 439 amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR, in jpeg_v2_6_dec_ring_insert_start() 441 amdgpu_ring_write(ring, 0x80000000 | (1 << (ring->me * 2 + 14))); in jpeg_v2_6_dec_ring_insert_start() 453 amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET, in jpeg_v2_6_dec_ring_insert_end() 455 amdgpu_ring_write(ring, 0x6aa04); /* PCTL0_MMHUB_DEEPSLEEP_IB */ in jpeg_v2_6_dec_ring_insert_end() 457 amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR, in jpeg_v2_6_dec_ring_insert_end() 459 amdgpu_ring_write(ring, (1 << (ring->me * 2 + 14))); in jpeg_v2_6_dec_ring_insert_end()
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A D | amdgpu_vce.c | 1069 amdgpu_ring_write(ring, VCE_CMD_IB); in amdgpu_vce_ring_emit_ib() 1070 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr)); in amdgpu_vce_ring_emit_ib() 1071 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in amdgpu_vce_ring_emit_ib() 1072 amdgpu_ring_write(ring, ib->length_dw); in amdgpu_vce_ring_emit_ib() 1089 amdgpu_ring_write(ring, VCE_CMD_FENCE); in amdgpu_vce_ring_emit_fence() 1090 amdgpu_ring_write(ring, addr); in amdgpu_vce_ring_emit_fence() 1091 amdgpu_ring_write(ring, upper_32_bits(addr)); in amdgpu_vce_ring_emit_fence() 1092 amdgpu_ring_write(ring, seq); in amdgpu_vce_ring_emit_fence() 1093 amdgpu_ring_write(ring, VCE_CMD_TRAP); in amdgpu_vce_ring_emit_fence() 1094 amdgpu_ring_write(ring, VCE_CMD_END); in amdgpu_vce_ring_emit_fence() [all …]
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