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Searched refs:ccm_base (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/clk/imx/
A Dclk-imx8mp.c409 void __iomem *anatop_base, *ccm_base; in imx8mp_clocks_probe() local
418 ccm_base = devm_platform_ioremap_resource(pdev, 0); in imx8mp_clocks_probe()
419 if (WARN_ON(IS_ERR(ccm_base))) { in imx8mp_clocks_probe()
421 return PTR_ERR(ccm_base); in imx8mp_clocks_probe()
564 hws[IMX8MP_CLK_CAN1] = imx8m_clk_hw_composite("can1", imx8mp_can1_sels, ccm_base + 0xa200); in imx8mp_clocks_probe()
565 hws[IMX8MP_CLK_CAN2] = imx8m_clk_hw_composite("can2", imx8mp_can2_sels, ccm_base + 0xa280); in imx8mp_clocks_probe()
567 hws[IMX8MP_CLK_I2C5] = imx8m_clk_hw_composite("i2c5", imx8mp_i2c5_sels, ccm_base + 0xa480); in imx8mp_clocks_probe()
568 hws[IMX8MP_CLK_I2C6] = imx8m_clk_hw_composite("i2c6", imx8mp_i2c6_sels, ccm_base + 0xa500); in imx8mp_clocks_probe()
569 hws[IMX8MP_CLK_SAI1] = imx8m_clk_hw_composite("sai1", imx8mp_sai1_sels, ccm_base + 0xa580); in imx8mp_clocks_probe()
570 hws[IMX8MP_CLK_SAI2] = imx8m_clk_hw_composite("sai2", imx8mp_sai2_sels, ccm_base + 0xa600); in imx8mp_clocks_probe()
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A Dclk-vf610.c14 #define CCM_CCR (ccm_base + 0x00)
15 #define CCM_CSR (ccm_base + 0x04)
16 #define CCM_CCSR (ccm_base + 0x08)
17 #define CCM_CACRR (ccm_base + 0x0c)
18 #define CCM_CSCMR1 (ccm_base + 0x10)
25 #define CCM_CISR (ccm_base + 0x30)
26 #define CCM_CIMR (ccm_base + 0x34)
27 #define CCM_CGPR (ccm_base + 0x3c)
69 static void __iomem *ccm_base; variable
205 ccm_base = of_iomap(np, 0); in vf610_clocks_init()
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A Dclk-imx5.c30 #define MXC_CCM_CCR (ccm_base + 0x00)
32 #define MXC_CCM_CSR (ccm_base + 0x08)
282 void __iomem *ccm_base; in mx50_clocks_init() local
298 ccm_base = of_iomap(np, 0); in mx50_clocks_init()
299 WARN_ON(!ccm_base); in mx50_clocks_init()
367 void __iomem *ccm_base; in mx51_clocks_init() local
383 ccm_base = of_iomap(np, 0); in mx51_clocks_init()
384 WARN_ON(!ccm_base); in mx51_clocks_init()
473 void __iomem *ccm_base; in mx53_clocks_init() local
493 ccm_base = of_iomap(np, 0); in mx53_clocks_init()
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A Dclk.c37 void imx_mmdc_mask_handshake(void __iomem *ccm_base, in imx_mmdc_mask_handshake() argument
42 reg = readl_relaxed(ccm_base + CCM_CCDR); in imx_mmdc_mask_handshake()
44 writel_relaxed(reg, ccm_base + CCM_CCDR); in imx_mmdc_mask_handshake()
A Dclk-imx6sl.c102 static void __iomem *ccm_base; variable
129 if (readl_relaxed(ccm_base + CCSR) & BM_CCSR_PLL1_SW_CLK_SEL) { in imx6sl_get_arm_divider_for_wait()
170 saved_arm_div = readl_relaxed(ccm_base + CACRR); in imx6sl_set_wait_clk()
171 writel_relaxed(arm_div_for_wait, ccm_base + CACRR); in imx6sl_set_wait_clk()
173 writel_relaxed(saved_arm_div, ccm_base + CACRR); in imx6sl_set_wait_clk()
175 while (__raw_readl(ccm_base + CDHIPR) & BM_CDHIPR_ARM_PODF_BUSY) in imx6sl_set_wait_clk()
291 ccm_base = base; in imx6sl_clocks_init()
A Dclk-imx6q.c266 static void mmdc_ch1_disable(void __iomem *ccm_base) in mmdc_ch1_disable() argument
274 reg = readl_relaxed(ccm_base + CCM_CCSR); in mmdc_ch1_disable()
276 writel_relaxed(reg, ccm_base + CCM_CCSR); in mmdc_ch1_disable()
279 static void mmdc_ch1_reenable(void __iomem *ccm_base) in mmdc_ch1_reenable() argument
284 reg = readl_relaxed(ccm_base + CCM_CCSR); in mmdc_ch1_reenable()
286 writel_relaxed(reg, ccm_base + CCM_CCSR); in mmdc_ch1_reenable()
324 reg = readl_relaxed(ccm_base + CCM_CS2CDR); in init_ldb_clks()
366 mmdc_ch1_disable(ccm_base); in init_ldb_clks()
369 reg = readl_relaxed(ccm_base + CCM_CS2CDR); in init_ldb_clks()
374 writel_relaxed(reg, ccm_base + CCM_CS2CDR); in init_ldb_clks()
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A Dclk-imx25.c41 #define ccm(x) (ccm_base + (x))
76 static int __init __mx25_clocks_init(void __iomem *ccm_base) in __mx25_clocks_init() argument
78 BUG_ON(!ccm_base); in __mx25_clocks_init()
A Dclk.h20 void imx_mmdc_mask_handshake(void __iomem *ccm_base, unsigned int chn);
/linux/arch/arm/mach-imx/
A Dpm-imx6.c63 static void __iomem *ccm_base; variable
226 struct imx6_pm_base ccm_base; member
254 val = readl_relaxed(ccm_base + CCR); in imx6_enable_rbc()
257 writel_relaxed(val, ccm_base + CCR); in imx6_enable_rbc()
260 val = readl_relaxed(ccm_base + CCR); in imx6_enable_rbc()
263 writel(val, ccm_base + CCR); in imx6_enable_rbc()
287 val = readl_relaxed(ccm_base + CCR); in imx6q_enable_wb()
523 pm_info->ccm_base.vbase = ccm_base; in imx6q_suspend_init()
601 WARN_ON(!ccm_base); in imx6_pm_common_init()
652 ccm_base = of_iomap(np, 0); in imx6_pm_ccm_init()
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A Dpm-imx27.c20 void __iomem *ccm_base; in mx27_suspend_enter() local
25 ccm_base = of_iomap(np, 0); in mx27_suspend_enter()
26 BUG_ON(!ccm_base); in mx27_suspend_enter()
31 cscr = imx_readl(ccm_base); in mx27_suspend_enter()
33 imx_writel(cscr, ccm_base); in mx27_suspend_enter()
A Dcpu-imx27.c25 void __iomem *ccm_base; in mx27_read_cpu_rev() local
30 ccm_base = of_iomap(np, 0); in mx27_read_cpu_rev()
31 BUG_ON(!ccm_base); in mx27_read_cpu_rev()
37 val = imx_readl(ccm_base + SYSCTRL_OFFSET + SYS_CHIP_ID); in mx27_read_cpu_rev()
A Dpm-imx5.c133 static void __iomem *ccm_base; variable
152 ccm_clpcr = imx_readl(ccm_base + MXC_CCM_CLPCR) & in mx5_cpu_lp_set()
194 imx_writel(ccm_clpcr, ccm_base + MXC_CCM_CLPCR); in mx5_cpu_lp_set()
388 ccm_base = ioremap(data->ccm_addr, SZ_16K); in imx5_pm_common_init()
391 WARN_ON(!ccm_base || !cortex_base || !gpc_base); in imx5_pm_common_init()

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