Home
last modified time | relevance | path

Searched refs:chunk_hdl_adjust_cur1 (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/
A Ddisplay_rq_dlg_helpers.c308 dlg_regs->chunk_hdl_adjust_cur1); in print__dlg_regs_st()
A Ddisplay_mode_structs.h480 unsigned int chunk_hdl_adjust_cur1; member
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_hw_sequencer_debug.c275 … dlg_regs->chunk_hdl_adjust_cur1, dlg_regs->vready_after_vcount0, dlg_regs->dst_y_delta_drq_limit, in dcn10_get_dlg_states()
A Ddcn10_hw_sequencer.c251 … dlg_regs->chunk_hdl_adjust_cur1, dlg_regs->vready_after_vcount0, dlg_regs->dst_y_delta_drq_limit, in dcn10_log_hubp_states()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddisplay_rq_dlg_calc_20.c1507 disp_dlg_regs->chunk_hdl_adjust_cur1 = 3; in dml20_rq_dlg_get_dlg_params()
A Ddisplay_rq_dlg_calc_20v2.c1508 disp_dlg_regs->chunk_hdl_adjust_cur1 = 3; in dml20v2_rq_dlg_get_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/
A Ddisplay_rq_dlg_calc_21.c1615 disp_dlg_regs->chunk_hdl_adjust_cur1 = 3; in dml_rq_dlg_get_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
A Ddisplay_rq_dlg_calc_30.c1789 disp_dlg_regs->chunk_hdl_adjust_cur1 = 3; in dml_rq_dlg_get_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
A Ddisplay_rq_dlg_calc_31.c1641 disp_dlg_regs->chunk_hdl_adjust_cur1 = 3; in dml_rq_dlg_get_dlg_params()

Completed in 31 milliseconds