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Searched refs:clk_div (Results 1 – 25 of 88) sorted by relevance

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/linux/drivers/pwm/
A Dpwm-crc.c44 int clk_div; in crc_pwm_calc_clk_div() local
46 clk_div = PWM_BASE_CLK_MHZ * period_ns / (256 * NSEC_PER_USEC); in crc_pwm_calc_clk_div()
48 if (clk_div > 0) in crc_pwm_calc_clk_div()
49 clk_div--; in crc_pwm_calc_clk_div()
51 return clk_div; in crc_pwm_calc_clk_div()
102 int clk_div = crc_pwm_calc_clk_div(state->period); in crc_pwm_apply() local
106 clk_div | pwm_output_enable); in crc_pwm_apply()
129 unsigned int clk_div, clk_div_reg, duty_cycle_reg; in crc_pwm_get_state() local
144 clk_div = (clk_div_reg & ~PWM_OUTPUT_ENABLE) + 1; in crc_pwm_get_state()
147 DIV_ROUND_UP(clk_div * NSEC_PER_USEC * 256, PWM_BASE_CLK_MHZ); in crc_pwm_get_state()
A Dpwm-mtk-disp.c75 u32 clk_div, period, high_width, value; in mtk_disp_pwm_apply() local
123 clk_div = mul_u64_u64_div_u64(state->period, rate, NSEC_PER_SEC) >> in mtk_disp_pwm_apply()
125 if (clk_div > PWM_CLKDIV_MAX) { in mtk_disp_pwm_apply()
133 div = NSEC_PER_SEC * (clk_div + 1); in mtk_disp_pwm_apply()
143 clk_div << PWM_CLKDIV_SHIFT); in mtk_disp_pwm_apply()
181 u32 clk_div, con0, con1; in mtk_disp_pwm_get_state() local
201 clk_div = FIELD_GET(PWM_CLKDIV_MASK, con0); in mtk_disp_pwm_get_state()
207 state->period = DIV64_U64_ROUND_UP(period * (clk_div + 1) * NSEC_PER_SEC, rate); in mtk_disp_pwm_get_state()
209 state->duty_cycle = DIV64_U64_ROUND_UP(high_width * (clk_div + 1) * NSEC_PER_SEC, in mtk_disp_pwm_get_state()
/linux/drivers/net/ethernet/xilinx/
A Dll_temac_mdio.c69 int clk_div; in temac_mdio_setup() local
81 clk_div = 0x3f; /* worst-case default setting */ in temac_mdio_setup()
83 clk_div = bus_hz / (2500 * 1000 * 2) - 1; in temac_mdio_setup()
84 if (clk_div < 1) in temac_mdio_setup()
85 clk_div = 1; in temac_mdio_setup()
86 if (clk_div > 0x3f) in temac_mdio_setup()
87 clk_div = 0x3f; in temac_mdio_setup()
92 temac_indirect_out32(lp, XTE_MC_OFFSET, 1 << 6 | clk_div); in temac_mdio_setup()
/linux/drivers/mfd/
A Dfsl-imx25-tsadc.c90 unsigned clk_div; in mx25_tsadc_setup_clk() local
102 clk_div = DIV_ROUND_UP(clk_get_rate(tsadc->clk), 1750000); in mx25_tsadc_setup_clk()
103 dev_dbg(&pdev->dev, "Setting up ADC clock divider to %u\n", clk_div); in mx25_tsadc_setup_clk()
106 clk_div -= 2; in mx25_tsadc_setup_clk()
107 clk_div /= 2; in mx25_tsadc_setup_clk()
113 clk_div = max_t(unsigned, 4, clk_div); in mx25_tsadc_setup_clk()
116 clk_get_rate(tsadc->clk) / (2 * clk_div + 2)); in mx25_tsadc_setup_clk()
120 MX25_TGCR_ADCCLKCFG(clk_div)); in mx25_tsadc_setup_clk()
/linux/drivers/clk/mxs/
A Dclk-div.c21 struct clk_div { struct
28 static inline struct clk_div *to_clk_div(struct clk_hw *hw) in to_clk_div() argument
32 return container_of(divider, struct clk_div, divider); in to_clk_div()
38 struct clk_div *div = to_clk_div(hw); in clk_div_recalc_rate()
46 struct clk_div *div = to_clk_div(hw); in clk_div_round_rate()
54 struct clk_div *div = to_clk_div(hw); in clk_div_set_rate()
73 struct clk_div *div; in mxs_clk_div()
/linux/arch/mips/ath25/
A Dar2315.c208 unsigned int clk_div; in ar2315_sys_clk() local
221 clk_div = ATH25_REG_MS(pllc_ctrl, AR2315_PLLC_CLKM_DIV); in ar2315_sys_clk()
222 clk_div = pllc_divide_table[clk_div]; in ar2315_sys_clk()
225 clk_div = ATH25_REG_MS(pllc_ctrl, AR2315_PLLC_CLKC_DIV); in ar2315_sys_clk()
226 clk_div = pllc_divide_table[clk_div]; in ar2315_sys_clk()
230 clk_div = 1; in ar2315_sys_clk()
237 return pllc_out / (clk_div * cpu_div); in ar2315_sys_clk()
/linux/drivers/spi/
A Dspi-axi-spi-engine.c133 unsigned int clk_div; in spi_engine_get_clk_div() local
137 if (clk_div > 255) in spi_engine_get_clk_div()
138 clk_div = 255; in spi_engine_get_clk_div()
139 else if (clk_div > 0) in spi_engine_get_clk_div()
140 clk_div -= 1; in spi_engine_get_clk_div()
142 return clk_div; in spi_engine_get_clk_div()
206 int clk_div, new_clk_div; in spi_engine_compile_message() local
209 clk_div = -1; in spi_engine_compile_message()
217 if (new_clk_div != clk_div) { in spi_engine_compile_message()
218 clk_div = new_clk_div; in spi_engine_compile_message()
[all …]
A Dspi-hisi-kunpeng.c117 u16 clk_div; /* baud rate divider */ member
280 if (chip->clk_div % chip->div_pre == 0) in __hisi_calc_div_reg()
286 if (chip->div_pre > chip->clk_div) in __hisi_calc_div_reg()
287 chip->div_pre = chip->clk_div; in __hisi_calc_div_reg()
289 chip->div_post = (chip->clk_div / chip->div_pre) - 1; in __hisi_calc_div_reg()
298 chip->clk_div = DIV_ROUND_UP(master->max_speed_hz, speed_hz) + 1; in hisi_calc_effective_speed()
299 chip->clk_div &= 0xfffe; in hisi_calc_effective_speed()
300 if (chip->clk_div > CLK_DIV_MAX) in hisi_calc_effective_speed()
301 chip->clk_div = CLK_DIV_MAX; in hisi_calc_effective_speed()
303 effective_speed = master->max_speed_hz / chip->clk_div; in hisi_calc_effective_speed()
/linux/sound/soc/ti/
A Ddavinci-i2s.c161 int clk_div; member
372 dev->clk_div = div; in davinci_i2s_dai_set_clkdiv()
410 clk_div = 256; in davinci_i2s_hw_params()
412 framesize = (freq / (--clk_div)) / in davinci_i2s_hw_params()
416 (clk_div)); in davinci_i2s_hw_params()
417 clk_div--; in davinci_i2s_hw_params()
426 clk_div &= 0xFF; in davinci_i2s_hw_params()
427 srgr |= clk_div; in davinci_i2s_hw_params()
431 clk_div = dev->clk_div - 1; in davinci_i2s_hw_params()
434 clk_div &= 0xFF; in davinci_i2s_hw_params()
[all …]
A Domap-dmic.c41 int clk_div; member
194 dmic->clk_div = omap_dmic_select_divider(dmic, params_rate(params)); in omap_dmic_dai_hw_params()
195 if (dmic->clk_div < 0) { in omap_dmic_dai_hw_params()
249 ctrl |= OMAP_DMIC_CLK_DIV(dmic->clk_div); in omap_dmic_dai_prepare()
/linux/drivers/i2c/busses/
A Di2c-sun6i-p2wi.c192 int clk_div; in p2wi_probe() local
287 clk_div = parent_clk_freq / clk_freq; in p2wi_probe()
288 if (!clk_div) { in p2wi_probe()
292 clk_div = 1; in p2wi_probe()
293 } else if (clk_div > P2WI_CCR_MAX_CLK_DIV) { in p2wi_probe()
297 clk_div = P2WI_CCR_MAX_CLK_DIV; in p2wi_probe()
300 writel(P2WI_CCR_SDA_OUT_DELAY(1) | P2WI_CCR_CLK_DIV(clk_div), in p2wi_probe()
A Di2c-mt7621.c64 u32 clk_div; member
95 iowrite32(((i2c->clk_div << 16) & SM0CTL0_CLK_DIV_MASK) | SM0CTL0_EN | in mtk_i2c_reset()
262 i2c->clk_div = clk_get_rate(i2c->clk) / i2c->bus_freq - 1; in mtk_i2c_init()
263 if (i2c->clk_div < 99) in mtk_i2c_init()
264 i2c->clk_div = 99; in mtk_i2c_init()
265 if (i2c->clk_div > SM0CTL0_CLK_DIV_MAX) in mtk_i2c_init()
266 i2c->clk_div = SM0CTL0_CLK_DIV_MAX; in mtk_i2c_init()
A Di2c-pasemi-platform.c32 data->smbus.clk_div = DIV_ROUND_UP(clk_rate, 16 * frequency); in pasemi_platform_i2c_calc_clk_div()
33 if (data->smbus.clk_div < 4) in pasemi_platform_i2c_calc_clk_div()
37 if (data->smbus.clk_div > 0xff) in pasemi_platform_i2c_calc_clk_div()
/linux/sound/soc/codecs/
A Dlpass-va-macro.c569 u8 clk_div; in va_dmic_clk_enable() local
607 clk_div = va->dmic_clk_div; in va_dmic_clk_enable()
621 if (*dmic_clk_div > clk_div) { in va_dmic_clk_enable()
634 clk_div = *dmic_clk_div; in va_dmic_clk_enable()
637 *dmic_clk_div = clk_div; in va_dmic_clk_enable()
643 clk_div = 0; in va_dmic_clk_enable()
648 clk_div = va->dmic_clk_div; in va_dmic_clk_enable()
649 if (*dmic_clk_div > clk_div) { in va_dmic_clk_enable()
650 clk_div = va->dmic_clk_div; in va_dmic_clk_enable()
663 clk_div = *dmic_clk_div; in va_dmic_clk_enable()
[all …]
/linux/drivers/bus/
A Dsunxi-rsb.c639 int clk_div, ret; in sunxi_rsb_hw_init() local
666 clk_div = p_clk_freq / rsb->clk_freq / 2; in sunxi_rsb_hw_init()
667 if (!clk_div) in sunxi_rsb_hw_init()
668 clk_div = 1; in sunxi_rsb_hw_init()
669 else if (clk_div > RSB_CCR_MAX_CLK_DIV + 1) in sunxi_rsb_hw_init()
670 clk_div = RSB_CCR_MAX_CLK_DIV + 1; in sunxi_rsb_hw_init()
672 clk_delay = clk_div >> 1; in sunxi_rsb_hw_init()
676 dev_info(dev, "RSB running at %lu Hz\n", p_clk_freq / clk_div / 2); in sunxi_rsb_hw_init()
677 writel(RSB_CCR_SDA_OUT_DELAY(clk_delay) | RSB_CCR_CLK_DIV(clk_div - 1), in sunxi_rsb_hw_init()
/linux/sound/soc/sti/
A Duniperif_player.c316 int clk_div; in uni_player_prepare_iec958() local
318 clk_div = player->mclk / runtime->rate; in uni_player_prepare_iec958()
321 if ((clk_div % 128) || (clk_div <= 0)) { in uni_player_prepare_iec958()
323 __func__, clk_div); in uni_player_prepare_iec958()
398 SET_UNIPERIF_CTRL_DIVIDER(player, clk_div / 128); in uni_player_prepare_iec958()
419 int output_frame_size, slot_width, clk_div; in uni_player_prepare_pcm() local
430 clk_div = player->mclk / runtime->rate; in uni_player_prepare_pcm()
435 if ((slot_width == 32) && (clk_div % 128)) { in uni_player_prepare_pcm()
440 if ((slot_width == 16) && (clk_div % 64)) { in uni_player_prepare_pcm()
487 SET_UNIPERIF_CTRL_DIVIDER(player, clk_div / (2 * output_frame_size)); in uni_player_prepare_pcm()
/linux/include/linux/dma/
A Dqcom-gpi-dma.h43 u32 clk_div; member
77 u16 clk_div; member
/linux/drivers/media/dvb-frontends/
A Dstv6110.c29 u8 clk_div; member
214 priv->regs[RSTV6110_CTRL2] |= (priv->clk_div << 6); in stv6110_init()
398 reg0[2] |= (config->clk_div << 6); in stv6110_attach()
418 priv->clk_div = config->clk_div; in stv6110_attach()
/linux/sound/soc/fsl/
A Dfsl_micfil.c155 int clk_div; in get_clk_div() local
161 clk_div = mclk_rate / (get_pdm_clk(micfil, rate) * 2); in get_clk_div()
163 return clk_div; in get_clk_div()
298 int clk_div; in fsl_set_clock_params() local
315 clk_div = get_clk_div(micfil, rate); in fsl_set_clock_params()
316 if (clk_div < 0) in fsl_set_clock_params()
320 MICFIL_CTRL2_CLKDIV_MASK, clk_div); in fsl_set_clock_params()
/linux/drivers/media/i2c/
A Drj54n1cb0c.c157 struct rj54n1_clock_div clk_div; member
417 static const struct rj54n1_clock_div clk_div = { variable
839 rj54n1->clk_div.ratio_tg); in rj54n1_set_clock()
842 rj54n1->clk_div.ratio_t); in rj54n1_set_clock()
845 rj54n1->clk_div.ratio_r); in rj54n1_set_clock()
858 rj54n1->clk_div.ratio_op); in rj54n1_set_clock()
861 rj54n1->clk_div.ratio_o); in rj54n1_set_clock()
1339 rj54n1->clk_div = clk_div; in rj54n1_probe()
1349 (clk_div.ratio_tg + 1) / (clk_div.ratio_t + 1); in rj54n1_probe()
/linux/drivers/leds/
A Dleds-bcm6358.c154 u32 clk_div; in bcm6358_leds_probe() local
170 of_property_read_u32(np, "brcm,clk-div", &clk_div); in bcm6358_leds_probe()
171 switch (clk_div) { in bcm6358_leds_probe()
/linux/drivers/video/fbdev/omap/
A Dsossi.c58 int clk_div; member
122 int div = t->clk_div; in calc_rd_timings()
173 int div = t->clk_div; in calc_wr_timings()
256 _set_timing(sossi.clk_div, in set_timing()
315 int div = t->clk_div; in sossi_convert_timings()
346 sossi.clk_div = t->tim[4]; in sossi_set_timings()
/linux/drivers/gpu/drm/i915/display/
A Dintel_dpll_mgr.c2097 clk_div->p1 = best_clock.p1; in bxt_ddi_hdmi_pll_dividers()
2098 clk_div->p2 = best_clock.p2; in bxt_ddi_hdmi_pll_dividers()
2100 clk_div->n = best_clock.n; in bxt_ddi_hdmi_pll_dividers()
2103 clk_div->m2_frac_en = clk_div->m2_frac != 0; in bxt_ddi_hdmi_pll_dividers()
2105 clk_div->vco = best_clock.vco; in bxt_ddi_hdmi_pll_dividers()
2116 *clk_div = bxt_dp_clk_val[0]; in bxt_ddi_dp_pll_dividers()
2119 *clk_div = bxt_dp_clk_val[i]; in bxt_ddi_dp_pll_dividers()
2124 clk_div->vco = clock * 10 / 2 * clk_div->p1 * clk_div->p2; in bxt_ddi_dp_pll_dividers()
2133 int vco = clk_div->vco; in bxt_ddi_set_dpll_hw_state()
2171 dpll_hw_state->ebb0 = PORT_PLL_P1(clk_div->p1) | PORT_PLL_P2(clk_div->p2); in bxt_ddi_set_dpll_hw_state()
[all …]
/linux/drivers/mmc/host/
A Dtifm_sd.c97 unsigned int clk_div; member
602 ((1000000000UL / host->clk_freq) * host->clk_div); in tifm_sd_set_data_timeout()
834 host->clk_div = clk_div1; in tifm_sd_ios()
840 host->clk_div = clk_div2; in tifm_sd_ios()
846 host->clk_div = 0; in tifm_sd_ios()
848 host->clk_div &= TIFM_MMCSD_CLKMASK; in tifm_sd_ios()
849 writel(host->clk_div in tifm_sd_ios()
890 host->clk_div = 61; in tifm_sd_initialize_host()
893 writel(host->clk_div | TIFM_MMCSD_POWER, in tifm_sd_initialize_host()
912 writel(host->clk_div | TIFM_MMCSD_POWER, in tifm_sd_initialize_host()
/linux/sound/soc/xilinx/
A Dxlnx_spdif.c109 u32 val, clk_div, clk_cfg; in xlnx_spdif_hw_params() local
112 clk_div = DIV_ROUND_CLOSEST(ctx->aclk, MAX_CHANNELS * AES_SAMPLE_WIDTH * in xlnx_spdif_hw_params()
115 switch (clk_div) { in xlnx_spdif_hw_params()

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