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Searched refs:cptpf (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/crypto/marvell/octeontx2/
A Dotx2_cptpf_main.c184 queue_work(cptpf->flr_wq, &cptpf->flr_work[dev].work); in cptpf_vf_flr_intr()
240 cptpf); in cptpf_register_vfpf_intr()
275 cptpf); in cptpf_register_vfpf_intr()
284 cptpf); in cptpf_register_vfpf_intr()
337 cptpf->flr_work[vf].pf = cptpf; in cptpf_flr_wq_init()
378 cptpf->pdev, cptpf->reg_base, MBOX_DIR_PFVF, in cptpf_vfpf_mbox_init()
385 cptpf->vf[i].cptpf = cptpf; in cptpf_vfpf_mbox_init()
661 ret = otx2_cpt_create_eng_grps(cptpf, &cptpf->eng_grps); in cptpf_sriov_enable()
701 cptpf = devm_kzalloc(dev, sizeof(*cptpf), GFP_KERNEL); in otx2_cptpf_probe()
702 if (!cptpf) in otx2_cptpf_probe()
[all …]
A Dotx2_cptpf_mbox.c157 vf = &cptpf->vf[vf_idx]; in otx2_cptpf_vfpf_mbox_intr()
173 struct otx2_cptpf_dev *cptpf; in otx2_cptpf_vfpf_mbox_handler() local
182 cptpf = vf->cptpf; in otx2_cptpf_vfpf_mbox_handler()
183 mbox = &cptpf->vfpf_mbox; in otx2_cptpf_vfpf_mbox_handler()
223 queue_work(cptpf->afpf_mbox_wq, &cptpf->afpf_mbox_work); in otx2_cptpf_afpf_mbox_intr()
286 dev_err(&cptpf->pdev->dev, in forward_to_vf()
291 dev_err(&cptpf->pdev->dev, in forward_to_vf()
299 dev_err(&cptpf->pdev->dev, in forward_to_vf()
301 vf_id, cptpf->enabled_vfs); in forward_to_vf()
309 dev_err(&cptpf->pdev->dev, in forward_to_vf()
[all …]
A Dotx2_cptpf_ucode.c160 return otx2_cpt_write_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in __write_ucode_base()
173 ret = otx2_cpt_write_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in cptx_set_ucode_base()
225 ret = otx2_cpt_read_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in cptx_detach_and_disable_cores()
235 cptpf->pdev, in cptx_detach_and_disable_cores()
252 cptpf->pdev, in cptx_detach_and_disable_cores()
311 ret = otx2_cpt_read_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in cptx_attach_and_enable_cores()
331 ret = otx2_cpt_add_write_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in cptx_attach_and_enable_cores()
337 return otx2_cpt_send_af_reg_requests(&cptpf->afpf_mbox, cptpf->pdev); in cptx_attach_and_enable_cores()
1222 ret = otx2_cpt_add_write_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in cptx_disable_all_cores()
1230 ret = otx2_cpt_send_af_reg_requests(&cptpf->afpf_mbox, cptpf->pdev); in cptx_disable_all_cores()
[all …]
A Dcn10k_cpt.c43 int cn10k_cptpf_lmtst_init(struct otx2_cptpf_dev *cptpf) in cn10k_cptpf_lmtst_init() argument
45 struct pci_dev *pdev = cptpf->pdev; in cn10k_cptpf_lmtst_init()
49 if (!test_bit(CN10K_LMTST, &cptpf->cap_flag)) { in cn10k_cptpf_lmtst_init()
50 cptpf->lfs.ops = &otx2_hw_ops; in cn10k_cptpf_lmtst_init()
54 cptpf->lfs.ops = &cn10k_hw_ops; in cn10k_cptpf_lmtst_init()
55 lmt_base = readq(cptpf->reg_base + RVU_PF_LMTLINE_ADDR); in cn10k_cptpf_lmtst_init()
61 size -= ((1 + cptpf->max_vfs) * MBOX_SIZE); in cn10k_cptpf_lmtst_init()
62 cptpf->lfs.lmt_base = devm_ioremap_wc(&pdev->dev, lmt_base, size); in cn10k_cptpf_lmtst_init()
63 if (!cptpf->lfs.lmt_base) { in cn10k_cptpf_lmtst_init()
A Dotx2_cptpf_ucode.h158 int otx2_cpt_create_eng_grps(struct otx2_cptpf_dev *cptpf,
160 int otx2_cpt_disable_all_cores(struct otx2_cptpf_dev *cptpf);
162 int otx2_cpt_discover_eng_capabilities(struct otx2_cptpf_dev *cptpf);
A Dcn10k_cpt.h33 int cn10k_cptpf_lmtst_init(struct otx2_cptpf_dev *cptpf);
A Dotx2_cptpf.h14 struct otx2_cptpf_dev *cptpf; /* PF pointer this VF belongs to */ member
/linux/drivers/crypto/cavium/cpt/
A DMakefile2 obj-$(CONFIG_CAVIUM_CPT) += cptpf.o cptvf.o
3 cptpf-objs := cptpf_main.o cptpf_mbox.o

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