| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_surface.c | 40 static void dc_plane_construct(struct dc_context *ctx, struct dc_plane_state *plane_state) in dc_plane_construct()
66 static void dc_plane_destruct(struct dc_plane_state *plane_state) in dc_plane_destruct()
97 void enable_surface_flip_reporting(struct dc_plane_state *plane_state, in enable_surface_flip_reporting()
104 struct dc_plane_state *dc_create_plane_state(struct dc *dc) in dc_create_plane_state()
106 struct dc_plane_state *plane_state = kvzalloc(sizeof(*plane_state), in dc_create_plane_state()
130 const struct dc_plane_state *plane_state) in dc_plane_get_status()
175 void dc_plane_state_retain(struct dc_plane_state *plane_state) in dc_plane_state_retain()
182 struct dc_plane_state *plane_state = container_of(kref, struct dc_plane_state, refcount); in dc_plane_state_free()
187 void dc_plane_state_release(struct dc_plane_state *plane_state) in dc_plane_state_release()
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| A D | dc_debug.c | 59 const struct dc_plane_state *const *plane_states, in pre_surface_trace()
66 const struct dc_plane_state *plane_state = plane_states[i]; in pre_surface_trace()
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| A D | dc_resource.c | 769 const struct dc_plane_state *plane_state = pipe_ctx->plane_state; in calculate_recout()
843 const struct dc_plane_state *plane_state = pipe_ctx->plane_state; in calculate_scaling_ratios()
959 const struct dc_plane_state *plane_state = pipe_ctx->plane_state; in calculate_inits_and_viewports()
1056 const struct dc_plane_state *plane_state = pipe_ctx->plane_state; in resource_build_scaling_params()
1385 struct dc_plane_state *plane_state, in dc_add_plane_to_context()
1470 struct dc_plane_state *plane_state, in dc_remove_plane_from_context()
1546 struct dc_plane_state *del_planes[MAX_SURFACE_NUM] = { 0 }; in dc_rem_all_planes_for_stream()
1599 struct dc_plane_state * const *plane_states, in dc_add_all_planes_for_stream()
3020 enum dc_status dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state) in dc_validate_plane()
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| A D | dc.c | 1614 struct dc_plane_state *plane_state) in should_update_pipe_for_plane()
2083 const struct dc_plane_state *plane_state) in is_surface_in_context()
2457 struct dc_plane_state *surface, in copy_surface_update_to_plane()
2923 struct dc_plane_state *plane_state = srf_updates[i].surface; in commit_planes_for_stream()
3000 struct dc_plane_state *plane_state = srf_updates[i].surface; in commit_planes_for_stream()
3019 struct dc_plane_state *plane_state = srf_updates[i].surface; in commit_planes_for_stream()
3150 struct dc_plane_state *surface = srf_updates[i].surface; in dc_commit_updates_for_stream()
3586 bool dc_is_plane_eligible_for_idle_optimizations(struct dc *dc, struct dc_plane_state *plane, in dc_is_plane_eligible_for_idle_optimizations()
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| A D | amdgpu_dm_color.c | 454 struct dc_plane_state *dc_plane_state) in amdgpu_dm_update_plane_color_mgmt() argument
462 switch (dc_plane_state->format) { in amdgpu_dm_update_plane_color_mgmt()
477 dc_plane_state->in_transfer_func->type = in amdgpu_dm_update_plane_color_mgmt()
505 dc_plane_state->in_transfer_func->tf = tf; in amdgpu_dm_update_plane_color_mgmt()
507 dc_plane_state->in_transfer_func->tf = in amdgpu_dm_update_plane_color_mgmt()
510 r = __set_input_tf(dc_plane_state->in_transfer_func, in amdgpu_dm_update_plane_color_mgmt()
519 dc_plane_state->in_transfer_func->type = TF_TYPE_PREDEFINED; in amdgpu_dm_update_plane_color_mgmt()
520 dc_plane_state->in_transfer_func->tf = tf; in amdgpu_dm_update_plane_color_mgmt()
524 dc_plane_state->in_transfer_func, NULL, false)) in amdgpu_dm_update_plane_color_mgmt()
528 dc_plane_state->in_transfer_func->type = TF_TYPE_BYPASS; in amdgpu_dm_update_plane_color_mgmt()
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| A D | amdgpu_dm.h | 77 struct dc_plane_state;
619 struct dc_plane_state *dc_state;
724 struct dc_plane_state *dc_plane_state);
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| A D | amdgpu_dm.c | 5538 struct dc_plane_state *dc_plane_state, in fill_dc_plane_attributes() argument
5562 &dc_plane_state->address, in fill_dc_plane_attributes()
5568 dc_plane_state->format = plane_info.format; in fill_dc_plane_attributes()
5570 dc_plane_state->format = plane_info.format; in fill_dc_plane_attributes()
5576 dc_plane_state->visible = plane_info.visible; in fill_dc_plane_attributes()
5580 dc_plane_state->dcc = plane_info.dcc; in fill_dc_plane_attributes()
5582 dc_plane_state->flip_int_enabled = true; in fill_dc_plane_attributes()
7493 struct dc_plane_state *plane_state = in dm_plane_helper_prepare_fb()
8797 struct dc_plane_state *surface, in update_freesync_state_on_stream()
9037 struct dc_plane_state *dc_plane; in amdgpu_dm_commit_planes()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| A D | dcn30_hwseq.h | 56 const struct dc_plane_state *plane_state);
60 const struct dc_plane_state *plane_state);
68 bool dcn30_does_plane_fit_in_mall(struct dc *dc, struct dc_plane_state *plane,
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| A D | dcn30_hwseq.c | 72 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state) in dcn30_set_blend_lut()
146 const struct dc_plane_state *plane_state) in dcn30_set_input_transfer_func()
740 struct dc_plane_state *plane = NULL; in dcn30_apply_idle_power_optimizations()
929 bool dcn30_does_plane_fit_in_mall(struct dc *dc, struct dc_plane_state *plane, struct dc_cursor_att… in dcn30_does_plane_fit_in_mall()
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| A D | dc.h | 285 struct dc_plane_state;
953 struct dc_plane_state { struct
1041 struct dc_plane_state *surface;
1065 struct dc_plane_state *dc_create_plane_state(struct dc *dc);
1067 const struct dc_plane_state *plane_state);
1069 void dc_plane_state_retain(struct dc_plane_state *plane_state);
1070 void dc_plane_state_release(struct dc_plane_state *plane_state);
1106 struct dc_plane_state *plane_states[MAX_SURFACES];
1114 enum dc_status dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state);
1270 uint32_t dc_get_opp_for_plane(struct dc *dc, struct dc_plane_state *plane);
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| A D | dc_stream.h | 47 struct dc_plane_state *plane_states[MAX_SURFACE_NUM];
93 struct dc_plane_state *writeback_source_plane;
367 struct dc_plane_state *plane_state,
373 struct dc_plane_state *plane_state,
384 struct dc_plane_state * const *plane_states,
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| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| A D | dcn20_hwseq.h | 32 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state);
34 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state);
44 const struct dc_plane_state *plane_state);
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| A D | dcn20_resource.h | 171 enum dc_status dcn20_patch_unknown_plane_state(struct dc_plane_state *plane_state);
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| A D | dcn20_hwseq.c | 836 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state) in dcn20_set_blend_lut()
858 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state) in dcn20_set_shaper_3dlut()
888 const struct dc_plane_state *plane_state) in dcn20_set_input_transfer_func()
1410 struct dc_plane_state *plane_state = pipe_ctx->plane_state; in dcn20_update_dchubp_dpp()
2070 struct dc_plane_state *plane_state = pipe_ctx->plane_state; in patch_address_for_sbs_tb_stereo()
2099 struct dc_plane_state *plane_state = pipe_ctx->plane_state; in dcn20_update_plane_addr()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/ |
| A D | hw_sequencer_private.h | 86 const struct dc_plane_state *plane_state);
141 const struct dc_plane_state *plane_state);
143 const struct dc_plane_state *plane_state);
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| A D | core_types.h | 45 void enable_surface_flip_reporting(struct dc_plane_state *plane_state,
152 enum dc_status (*validate_plane)(const struct dc_plane_state *plane_state, struct dc_caps *caps);
164 struct dc_plane_state *plane_state);
359 struct dc_plane_state *plane_state;
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| A D | resource.h | 150 struct dc_plane_state *const *plane_state,
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| A D | hw_sequencer.h | 225 bool (*does_plane_fit_in_mall)(struct dc *dc, struct dc_plane_state *plane,
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| /linux/drivers/gpu/drm/amd/display/dc/basics/ |
| A D | dc_common.h | 40 const struct dc_plane_state *plane_state);
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| A D | dc_common.c | 82 const struct dc_plane_state *plane_state) in build_prescale_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dce100/ |
| A D | dce100_resource.h | 42 enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps…
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| /linux/drivers/gpu/drm/amd/display/include/ |
| A D | logger_interface.h | 45 const struct dc_plane_state *const *plane_states,
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| /linux/drivers/gpu/drm/amd/display/modules/inc/ |
| A D | mod_freesync.h | 162 const struct dc_plane_state *plane,
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| /linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_hw_sequencer.h | 72 const struct dc_plane_state *plane_state);
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| /linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| A D | dcn201_hwseq.c | 59 struct dc_plane_state *plane_state = pipe_ctx->plane_state; in patch_address_for_sbs_tb_stereo()
135 struct dc_plane_state *plane_state = pipe_ctx->plane_state; in dcn201_update_plane_addr()
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