Searched refs:frac_width (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/clk/tegra/
A D	clk-divider.c	16 #define get_mul(d) (1 << d->frac_width) 27 divider->frac_width, divider->flags); in get_div() 137 u8 frac_width, spinlock_t *lock) in tegra_clk_register_divider() argument 159 divider->frac_width = frac_width; in tegra_clk_register_divider()
A D	clk-utils.c	13 u8 frac_width, u8 flags) in div_frac_get() argument 21 mul = 1 << frac_width; in div_frac_get()
A D	clk.h	122 u8 frac_width; member 137 u8 frac_width, spinlock_t *lock); 658 .frac_width = _div_frac_width, \ 910 u8 frac_width, u8 flags);
A D	clk-tegra-super-cclk.c	159 super->frac_div.frac_width = 1; in tegra_clk_register_super_cclk()
A D	clk-super.c	262 super->frac_div.frac_width = 1; in tegra_clk_register_super_clk()
A D	clk-tegra-periph.c	933 data->periph.divider.frac_width, in div_clk_init()
/linux/drivers/clk/hisilicon/
A D	clk-hi3559a.c	31 const u8 frac_width; member 48 u8 frac_width; member 386 val &= ~(((1 << clk->frac_width) - 1) << clk->frac_shift); in clk_pll_set_rate() 417 val &= ((1 << clk->frac_width) - 1); in clk_pll_recalc_rate() 479 p_clk->frac_width = clks[i].frac_width; in hisi_clk_register_pll()
/linux/drivers/clk/bcm/
A D	clk-kona.h	68 (div)->u.s.frac_width > 0) 272 u32 frac_width; /* field fraction width */ member 314 .u.s.frac_width = (_frac_width), \
A D	clk-kona-setup.c	352 if (div->u.s.frac_width > div->u.s.width) { in div_valid() 355 div->u.s.frac_width, div->u.s.width); in div_valid() 387 return div->u.s.frac_width + pre_div->u.s.frac_width <= limit; in kona_dividers_valid()
A D	clk-kona.c	60 return (u64)reg_div + ((u64)1 << div->u.s.frac_width); in scaled_div_value() 76 combined <<= div->u.s.frac_width; in scaled_div_build() 114 return (u32)(scaled_div - ((u64)1 << div->u.s.frac_width)); in divider() 124 return (u64)rate << div->u.s.frac_width; in scale_rate()

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