Searched refs:gfx_table (Results 1 – 16 of 16) sorted by relevance
315 dpm_table = &dpm_context->dpm_tables.gfx_table; in aldebaran_set_default_dpm_table()493 struct smu_13_0_dpm_table *gfx_table = in aldebaran_populate_umd_state_clk() local494 &dpm_context->dpm_tables.gfx_table; in aldebaran_populate_umd_state_clk()502 pstate_table->gfxclk_pstate.min = gfx_table->min; in aldebaran_populate_umd_state_clk()503 pstate_table->gfxclk_pstate.peak = gfx_table->max; in aldebaran_populate_umd_state_clk()1271 struct smu_13_0_dpm_table *gfx_table = in aldebaran_set_performance_level() local1272 &dpm_context->dpm_tables.gfx_table; in aldebaran_set_performance_level()1343 (max > dpm_context->dpm_tables.gfx_table.max)) { in aldebaran_set_soft_freq_limited_range()1350 min_clk = dpm_context->dpm_tables.gfx_table.min; in aldebaran_set_soft_freq_limited_range()1351 max_clk = dpm_context->dpm_tables.gfx_table.max; in aldebaran_set_soft_freq_limited_range()[all …]
61 struct aldebaran_single_dpm_table gfx_table; member
1636 struct smu_13_0_dpm_table *gfx_table = in smu_v13_0_set_performance_level() local1637 &dpm_context->dpm_tables.gfx_table; in smu_v13_0_set_performance_level()1652 sclk_min = sclk_max = gfx_table->max; in smu_v13_0_set_performance_level()1657 sclk_min = sclk_max = gfx_table->min; in smu_v13_0_set_performance_level()1662 sclk_min = gfx_table->min; in smu_v13_0_set_performance_level()1663 sclk_max = gfx_table->max; in smu_v13_0_set_performance_level()
658 dpm_table = &(data->dpm_table.gfx_table); in vega12_setup_default_dpm_tables()1632 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega12_force_dpm_highest()1633 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega12_force_dpm_highest()1661 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega12_force_dpm_lowest()1662 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega12_force_dpm_lowest()1835 dpm_table = &(data->dpm_table.gfx_table); in vega12_get_sclks()2006 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega12_force_clock_level()2341 dpm_table = &(data->dpm_table.gfx_table); in vega12_apply_clocks_adjust_rules()2642 for (i = 0; i < dpm_table->gfx_table.count; i++) {2643 if (dpm_table->gfx_table.dpm_levels[i].enabled &&[all …]
590 dpm_table = &(data->dpm_table.gfx_table); in vega20_setup_gfxclk_dpm_table()656 dpm_table = &(data->dpm_table.gfx_table); in vega20_setup_default_dpm_tables()1471 &(data->dpm_table.gfx_table); in vega20_get_sclk_od()1473 &(data->golden_dpm_table.gfx_table); in vega20_get_sclk_od()1490 &(data->golden_dpm_table.gfx_table); in vega20_set_sclk_od()1562 struct vega20_single_dpm_table *gfx_table = &(data->dpm_table.gfx_table); in vega20_populate_umdpstate_clocks() local1565 hwmgr->pstate_sclk = gfx_table->dpm_levels[0].value; in vega20_populate_umdpstate_clocks()2388 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega20_force_dpm_highest()2430 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega20_force_dpm_lowest()2569 data->dpm_table.gfx_table.count - 1); in vega20_force_clock_level()[all …]
1351 dpm_table = &(data->dpm_table.gfx_table); in vega10_setup_default_dpm_tables()3531 &(data->dpm_table.gfx_table), in vega10_trim_dpm_states()3601 data->dpm_table.gfx_table.dpm_state.soft_min_level) { in vega10_upload_dpm_bootup_level()3607 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega10_upload_dpm_bootup_level()3659 data->dpm_table.gfx_table.dpm_state.soft_max_level) { in vega10_upload_dpm_max_level()3664 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega10_upload_dpm_max_level()4935 &(data->golden_dpm_table.gfx_table); in vega10_get_sclk_od()4950 &(data->golden_dpm_table.gfx_table); in vega10_set_sclk_od()5207 golden_table = &(data->golden_dpm_table.gfx_table); in vega10_check_clk_voltage_valid()5237 &data->dpm_table.gfx_table; in vega10_odn_update_power_state()[all …]
148 struct vega10_single_dpm_table gfx_table; member
127 struct vega12_single_dpm_table gfx_table; member
179 struct vega20_single_dpm_table gfx_table; member
61 struct arcturus_single_dpm_table gfx_table; member
365 dpm_table = &dpm_context->dpm_tables.gfx_table; in arcturus_set_default_dpm_table()545 struct smu_11_0_dpm_table *gfx_table = in arcturus_populate_umd_state_clk() local546 &dpm_context->dpm_tables.gfx_table; in arcturus_populate_umd_state_clk()554 pstate_table->gfxclk_pstate.min = gfx_table->min; in arcturus_populate_umd_state_clk()555 pstate_table->gfxclk_pstate.peak = gfx_table->max; in arcturus_populate_umd_state_clk()563 if (gfx_table->count > ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL && in arcturus_populate_umd_state_clk()567 gfx_table->dpm_levels[ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL].value; in arcturus_populate_umd_state_clk()805 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in arcturus_print_clk_levels()976 freq = dpm_context->dpm_tables.gfx_table.dpm_levels[level].value; in arcturus_upload_dpm_level()1046 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in arcturus_force_clk_levels()
1884 struct smu_11_0_dpm_table *gfx_table = in smu_v11_0_set_performance_level() local1885 &dpm_context->dpm_tables.gfx_table; in smu_v11_0_set_performance_level()1900 sclk_min = sclk_max = gfx_table->max; in smu_v11_0_set_performance_level()1905 sclk_min = sclk_max = gfx_table->min; in smu_v11_0_set_performance_level()1910 sclk_min = gfx_table->min; in smu_v11_0_set_performance_level()1911 sclk_max = gfx_table->max; in smu_v11_0_set_performance_level()
1004 dpm_table = &dpm_context->dpm_tables.gfx_table; in navi10_set_default_dpm_table()1503 struct smu_11_0_dpm_table *gfx_table = in navi10_populate_umd_state_clk() local1504 &dpm_context->dpm_tables.gfx_table; in navi10_populate_umd_state_clk()1514 pstate_table->gfxclk_pstate.min = gfx_table->min; in navi10_populate_umd_state_clk()1558 sclk_freq = gfx_table->dpm_levels[gfx_table->count - 1].value; in navi10_populate_umd_state_clk()1569 if (gfx_table->max > NAVI10_UMD_PSTATE_PROFILING_GFXCLK && in navi10_populate_umd_state_clk()
696 dpm_table = &dpm_context->dpm_tables.gfx_table; in sienna_cichlid_set_default_dpm_table()1226 struct smu_11_0_dpm_table *gfx_table = in sienna_cichlid_populate_umd_state_clk() local1227 &dpm_context->dpm_tables.gfx_table; in sienna_cichlid_populate_umd_state_clk()1235 pstate_table->gfxclk_pstate.min = gfx_table->min; in sienna_cichlid_populate_umd_state_clk()1236 pstate_table->gfxclk_pstate.peak = gfx_table->max; in sienna_cichlid_populate_umd_state_clk()1237 if (gfx_table->max >= SIENNA_CICHLID_UMD_PSTATE_PROFILING_GFXCLK) in sienna_cichlid_populate_umd_state_clk()
83 struct smu_13_0_dpm_table gfx_table; member
105 struct smu_11_0_dpm_table gfx_table; member
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