Searched refs:hwsp_offset (Results 1 – 12 of 12) sorted by relevance
| /linux/drivers/gpu/drm/i915/gt/ |
| A D | intel_timeline.c | 58 u32 ofs = offset_in_page(timeline->hwsp_offset); in intel_timeline_pin_map()
83 timeline->hwsp_offset = offset; in intel_timeline_init()
94 timeline->hwsp_seqno = (void *)(long)timeline->hwsp_offset; in intel_timeline_init()
96 GEM_BUG_ON(timeline->hwsp_offset >= hwsp->size); in intel_timeline_init()
205 tl->hwsp_offset = in intel_timeline_pin()
207 offset_in_page(tl->hwsp_offset); in intel_timeline_pin()
209 tl->fence_context, tl->hwsp_offset); in intel_timeline_pin()
308 u32 next_ofs = offset_in_page(tl->hwsp_offset + TIMELINE_SEQNO_BYTES); in __intel_timeline_get_seqno()
314 tl->hwsp_offset = i915_ggtt_offset(tl->hwsp_ggtt) + next_ofs; in __intel_timeline_get_seqno()
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| A D | gen8_engine_cs.c | 338 static u32 hwsp_offset(const struct i915_request *rq) in hwsp_offset() function
347 return page_mask_bits(tl->hwsp_offset) + offset_in_page(rq->hwsp_seqno); in hwsp_offset()
363 *cs++ = hwsp_offset(rq); in gen8_emit_init_breadcrumb()
520 return gen8_emit_ggtt_write(cs, rq->fence.seqno, hwsp_offset(rq), 0); in emit_xcs_breadcrumb()
539 hwsp_offset(rq), in gen8_emit_fini_breadcrumb_rcs()
550 hwsp_offset(rq), in gen11_emit_fini_breadcrumb_rcs()
622 hwsp_offset(rq), in gen12_emit_fini_breadcrumb_rcs()
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| A D | selftest_timeline.c | 37 return (address + offset_in_page(tl->hwsp_offset)) / TIMELINE_SEQNO_BYTES; in hwsp_cacheline()
507 err = emit_ggtt_store_dw(rq, tl->hwsp_offset, value); in checked_tl_write()
584 n, tl->fence_context, tl->hwsp_offset, *tl->hwsp_seqno); in live_hwsp_engine()
656 n, tl->fence_context, tl->hwsp_offset, *tl->hwsp_seqno); in live_hwsp_alternate()
716 seqno[0], tl->hwsp_offset); in live_hwsp_wrap()
718 err = emit_ggtt_store_dw(rq, tl->hwsp_offset, seqno[0]); in live_hwsp_wrap()
733 seqno[1], tl->hwsp_offset); in live_hwsp_wrap()
735 err = emit_ggtt_store_dw(rq, tl->hwsp_offset, seqno[1]); in live_hwsp_wrap()
1386 tl->hwsp_offset, *tl->hwsp_seqno); in live_hwsp_recycle()
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| A D | intel_timeline_types.h | 49 u32 hwsp_offset; member
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| A D | intel_timeline.h | 82 u32 *hwsp_offset);
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| A D | selftest_rc6.c | 148 *cs++ = ce->timeline->hwsp_offset + 8; in __live_rc6_ctx()
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| A D | selftest_engine_cs.c | 59 *cs++ = tl->hwsp_offset + slot * sizeof(u32); in write_timestamp()
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| A D | intel_engine_cs.c | 1481 tl ? tl->hwsp_offset : 0, in print_ring()
1775 tl->hwsp_offset); in engine_dump_request()
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| /linux/drivers/gpu/drm/i915/selftests/ |
| A D | i915_request.c | 1819 static u32 hwsp_offset(const struct intel_context *ce, u32 *dw) in hwsp_offset() function
1828 const u32 offset = hwsp_offset(ce, sema); in measure_semaphore_response()
1903 const u32 offset = hwsp_offset(ce, sema); in measure_idle_dispatch()
1974 const u32 offset = hwsp_offset(ce, sema); in measure_busy_dispatch()
2077 const u32 offset = hwsp_offset(ce, sema); in measure_inter_request()
2168 const u32 offset = hwsp_offset(ce, sema); in measure_context_switch()
2262 const u32 offset = hwsp_offset(ce, sema); in measure_preemption()
2382 const u32 offset = hwsp_offset(ce, sema); in measure_completion()
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| /linux/drivers/gpu/drm/i915/ |
| A D | i915_request.h | 671 page_mask_bits(i915_request_active_timeline(rq)->hwsp_offset); in i915_request_active_seqno()
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| A D | i915_request.c | 1104 u32 hwsp_offset; in __emit_semaphore_wait() local
1112 err = intel_timeline_read_hwsp(from, to, &hwsp_offset); in __emit_semaphore_wait()
1138 *cs++ = hwsp_offset; in __emit_semaphore_wait()
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| /linux/drivers/gpu/drm/i915/gt/uc/ |
| A D | intel_guc_submission.c | 4145 i915_request_active_timeline(rq)->hwsp_offset, in emit_fini_breadcrumb_parent_no_preempt_mid_batch()
4212 i915_request_active_timeline(rq)->hwsp_offset, in emit_fini_breadcrumb_child_no_preempt_mid_batch()
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