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Searched refs:ixLCAC_MC2_OVR_SEL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/smu/
A Dsmu_6_0_d.h33 #define ixLCAC_MC2_OVR_SEL 0x0123 macro
A Dsmu_8_0_d.h639 #define ixLCAC_MC2_OVR_SEL 0xd020814c macro
A Dsmu_7_0_0_d.h732 #define ixLCAC_MC2_OVR_SEL 0xc0400d4c macro
A Dsmu_7_1_1_d.h1032 #define ixLCAC_MC2_OVR_SEL 0xc040014c macro
A Dsmu_7_0_1_d.h1222 #define ixLCAC_MC2_OVR_SEL 0xc0400d4c macro
A Dsmu_7_1_2_d.h1183 #define ixLCAC_MC2_OVR_SEL 0xc040014c macro
A Dsmu_7_1_3_d.h1115 #define ixLCAC_MC2_OVR_SEL 0xc040014c macro
A Dsmu_7_1_0_d.h1251 #define ixLCAC_MC2_OVR_SEL 0xc0400d4c macro
/linux/drivers/gpu/drm/amd/pm/powerplay/
A Dkv_dpm.c546 WREG32_SMC(ixLCAC_MC2_OVR_SEL, 0);

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