Home
last modified time | relevance | path

Searched refs:lane (Results 1 – 25 of 201) sorted by relevance

123456789

/linux/drivers/phy/marvell/
A Dphy-mvebu-cp110-comphy.c180 unsigned lane; member
304 if (conf->lane == lane && in mvebu_comphy_get_mode()
376 lane->id); in mvebu_comphy_ethernet_init_reset()
397 lane->id); in mvebu_comphy_ethernet_init_reset()
724 mux = mvebu_comphy_get_mux(lane->id, lane->port, in mvebu_comphy_power_on_legacy()
725 lane->mode, lane->submode); in mvebu_comphy_power_on_legacy()
769 fw_mode = mvebu_comphy_get_fw_mode(lane->id, lane->port, in mvebu_comphy_power_on()
770 lane->mode, lane->submode); in mvebu_comphy_power_on()
780 lane->id); in mvebu_comphy_power_on()
785 lane->id); in mvebu_comphy_power_on()
[all …]
A Dphy-mvebu-a3700-comphy.c52 unsigned int lane; member
134 if (mvebu_a3700_comphy_modes[i].lane == lane && in mvebu_a3700_comphy_get_fw_mode()
177 fw_mode = mvebu_a3700_comphy_get_fw_mode(lane->id, lane->port, in mvebu_a3700_comphy_power_on()
178 lane->mode, lane->submode); in mvebu_a3700_comphy_power_on()
190 dev_dbg(lane->dev, "set lane %d to SATA mode\n", lane->id); in mvebu_a3700_comphy_power_on()
197 lane->id); in mvebu_a3700_comphy_power_on()
203 lane->id); in mvebu_a3700_comphy_power_on()
214 dev_dbg(lane->dev, "set lane %d to PCIe mode\n", lane->id); in mvebu_a3700_comphy_power_on()
220 dev_err(lane->dev, "unsupported PHY mode (%d)\n", lane->mode); in mvebu_a3700_comphy_power_on()
288 lane = devm_kzalloc(&pdev->dev, sizeof(*lane), GFP_KERNEL); in mvebu_a3700_comphy_probe()
[all …]
A Dphy-armada38x-comphy.c66 conf |= BIT(lane->port); in a38x_set_conf()
68 conf &= ~BIT(lane->port); in a38x_set_conf()
102 dev_err(lane->priv->dev, in a38x_comphy_poll()
135 a38x_set_conf(lane, false); in a38x_comphy_set_mode()
146 a38x_set_conf(lane, true); in a38x_comphy_set_mode()
171 if (lane->port >= 0) in a38x_comphy_xlate()
174 lane->port = args->args[0]; in a38x_comphy_xlate()
179 if (!gbe_mux[lane->n][lane->port] || in a38x_comphy_xlate()
180 val != gbe_mux[lane->n][lane->port]) { in a38x_comphy_xlate()
181 dev_warn(lane->priv->dev, in a38x_comphy_xlate()
[all …]
/linux/drivers/net/dsa/mv88e6xxx/
A Dserdes.c272 return lane; in mv88e6352_serdes_get_lane()
386 int lane) in mv88e6352_serdes_irq_status() argument
459 return lane; in mv88e6341_serdes_get_lane()
557 int lane) in mv88e6097_serdes_irq_status() argument
591 return lane; in mv88e6390_serdes_get_lane()
666 return lane; in mv88e6390x_serdes_get_lane()
685 lane = port; in mv88e6393x_serdes_get_lane()
687 return lane; in mv88e6393x_serdes_get_lane()
799 int lane; in mv88e6390_serdes_get_stats() local
803 if (lane < 0) in mv88e6390_serdes_get_stats()
[all …]
A Dserdes.h111 int lane, unsigned int mode,
127 int lane);
129 int lane);
154 int lane, bool enable);
156 int lane);
158 int lane);
160 int lane);
162 int lane);
190 int port, int lane) in mv88e6xxx_serdes_power_up() argument
199 int port, int lane) in mv88e6xxx_serdes_power_down() argument
[all …]
/linux/drivers/net/dsa/b53/
A Db53_serdes.c39 if (dev->serdes_lane == lane) in b53_serdes_set_lane()
42 WARN_ON(lane > 1); in b53_serdes_set_lane()
46 dev->serdes_lane = lane; in b53_serdes_set_lane()
52 b53_serdes_set_lane(dev, lane); in b53_serdes_write()
59 b53_serdes_set_lane(dev, lane); in b53_serdes_read()
69 if (lane == B53_INVALID_LANE) in b53_serdes_config()
88 if (lane == B53_INVALID_LANE) in b53_serdes_an_restart()
105 if (lane == B53_INVALID_LANE) in b53_serdes_link_state()
147 if (lane == B53_INVALID_LANE) in b53_serdes_link_set()
167 if (lane == B53_INVALID_LANE) in b53_serdes_phylink_validate()
[all …]
/linux/drivers/phy/
A Dphy-xgene.c688 serdes_rd(ctx, lane, reg, &val); in serdes_clrbits()
690 serdes_wr(ctx, lane, reg, val); in serdes_clrbits()
698 serdes_rd(ctx, lane, reg, &val); in serdes_setbits()
700 serdes_wr(ctx, lane, reg, val); in serdes_setbits()
943 int lane; in xgene_phy_sata_cfg_lanes() local
945 for (lane = 0; lane < MAX_LANE; lane++) { in xgene_phy_sata_cfg_lanes()
960 ctx->sata_param.speed[lane]]); in xgene_phy_sata_cfg_lanes()
988 ctx->sata_param.speed[lane]]); in xgene_phy_sata_cfg_lanes()
991 ctx->sata_param.speed[lane]]); in xgene_phy_sata_cfg_lanes()
994 ctx->sata_param.speed[lane]]); in xgene_phy_sata_cfg_lanes()
[all …]
/linux/drivers/phy/tegra/
A Dxusb.c137 lane->pad->ops->remove(lane); in tegra_xusb_lane_destroy()
325 lane->pad->ops->iddq_enable(lane); in tegra_xusb_lane_program()
334 lane->pad->ops->iddq_disable(lane); in tegra_xusb_lane_program()
388 const char *func = lane->soc->funcs[lane->function]; in tegra_xusb_lane_check()
406 hit = lane; in tegra_xusb_find_lane()
438 match = lane; in tegra_xusb_port_find_lane()
1378 return lane->pad->ops->enable_phy_sleepwalk(lane, speed); in tegra_xusb_padctl_enable_phy_sleepwalk()
1389 return lane->pad->ops->disable_phy_sleepwalk(lane); in tegra_xusb_padctl_disable_phy_sleepwalk()
1400 return lane->pad->ops->enable_phy_wake(lane); in tegra_xusb_padctl_enable_phy_wake()
1411 return lane->pad->ops->disable_phy_wake(lane); in tegra_xusb_padctl_disable_phy_wake()
[all …]
A Dxusb-tegra210.c455 lane->pad->soc->lanes[lane->index].name, map->port); in tegra210_usb3_lane_map()
716 if (IS_ERR(lane)) in tegra210_sata_uphy_enable()
1699 struct tegra_xusb_lane *lane; in tegra210_usb3_set_lfps_detect() local
1706 lane = port->lane; in tegra210_usb3_set_lfps_detect()
1919 lane->index); in tegra210_usb2_phy_set_mode()
2123 lane->index); in tegra210_usb2_phy_power_off()
2567 if (!lane || !lane->pad || !lane->pad->padctl) in tegra210_lane_to_usb3_port()
3090 struct tegra_xusb_lane *lane; in tegra210_utmi_port_reset() local
3093 lane = phy_get_drvdata(phy); in tegra210_utmi_port_reset()
3094 padctl = lane->pad->padctl; in tegra210_utmi_port_reset()
[all …]
A Dxusb.h62 to_usb3_lane(struct tegra_xusb_lane *lane) in to_usb3_lane() argument
75 to_usb2_lane(struct tegra_xusb_lane *lane) in to_usb2_lane() argument
85 to_ulpi_lane(struct tegra_xusb_lane *lane) in to_ulpi_lane() argument
104 to_hsic_lane(struct tegra_xusb_lane *lane) in to_hsic_lane() argument
114 to_pcie_lane(struct tegra_xusb_lane *lane) in to_pcie_lane() argument
124 to_sata_lane(struct tegra_xusb_lane *lane) in to_sata_lane() argument
133 void (*remove)(struct tegra_xusb_lane *lane);
134 void (*iddq_enable)(struct tegra_xusb_lane *lane);
135 void (*iddq_disable)(struct tegra_xusb_lane *lane);
138 int (*enable_phy_wake)(struct tegra_xusb_lane *lane);
[all …]
A Dxusb-tegra124.c292 struct tegra_xusb_lane *lane; in tegra124_usb3_save_context() local
300 lane = port->base.lane; in tegra124_usb3_save_context()
302 if (lane->pad == padctl->pcie) in tegra124_usb3_save_context()
486 unsigned int index = lane->index; in tegra124_usb2_phy_power_on()
578 lane->index); in tegra124_usb2_phy_power_off()
869 unsigned int index = lane->index; in tegra124_hsic_phy_power_on()
938 unsigned int index = lane->index; in tegra124_hsic_phy_power_off()
1480 struct tegra_xusb_lane *lane = usb3->base.lane; in tegra124_usb3_port_enable() local
1542 if (lane->pad == padctl->pcie) in tegra124_usb3_port_enable()
1554 if (lane->pad == padctl->pcie) in tegra124_usb3_port_enable()
[all …]
A Dxusb-tegra186.c320 unsigned int index = lane->index; in tegra186_utmi_enable_phy_sleepwalk()
464 unsigned int index = lane->index; in tegra186_utmi_disable_phy_sleepwalk()
504 unsigned int index = lane->index; in tegra186_utmi_enable_phy_wake()
529 unsigned int index = lane->index; in tegra186_utmi_disable_phy_wake()
554 unsigned int index = lane->index; in tegra186_utmi_phy_remote_wake_detected()
647 unsigned int index = lane->index; in tegra_phy_xusb_utmi_pad_power_on()
676 unsigned int index = lane->index; in tegra_phy_xusb_utmi_pad_power_down()
753 lane->index); in tegra186_utmi_phy_set_mode()
793 unsigned int index = lane->index; in tegra186_utmi_phy_power_on()
870 unsigned int index = lane->index; in tegra186_utmi_phy_init()
[all …]
/linux/drivers/gpu/drm/i915/display/
A Dintel_dp_link_training.c317 lane = min(lane, crtc_state->lane_count - 1); in intel_dp_get_lane_adjust_tx_ffe_preset()
320 for (lane = 0; lane < crtc_state->lane_count; lane++) in intel_dp_get_lane_adjust_tx_ffe_preset()
340 lane = min(lane, crtc_state->lane_count - 1); in intel_dp_get_lane_adjust_vswing_preemph()
345 for (lane = 0; lane < crtc_state->lane_count; lane++) { in intel_dp_get_lane_adjust_vswing_preemph()
368 int lane) in intel_dp_get_lane_adjust_train() argument
410 int lane; in intel_dp_get_adjust_train() local
430 for (lane = 0; lane < 4; lane++) in intel_dp_get_adjust_train()
621 int lane; in intel_dp_link_max_vswing_reached() local
623 for (lane = 0; lane < crtc_state->lane_count; lane++) { in intel_dp_link_max_vswing_reached()
699 int lane; in intel_dp_adjust_request_changed() local
[all …]
/linux/drivers/gpu/drm/bridge/analogix/
A Danalogix_dp_core.c268 for (lane = 0; lane < lane_count; lane++) in analogix_dp_link_start()
289 for (lane = 0; lane < lane_count; lane++) in analogix_dp_link_start()
315 for (lane = 0; lane < lane_count; lane++) in analogix_dp_link_start()
340 for (lane = 0; lane < lane_count; lane++) { in analogix_dp_clock_recovery_ok()
357 for (lane = 0; lane < lane_count; lane++) { in analogix_dp_channel_eq_ok()
449 for (lane = 0; lane < lane_count; lane++) { in analogix_dp_get_adjust_training_lane()
498 for (lane = 0; lane < lane_count; lane++) { in analogix_dp_process_clock_recovery()
526 for (lane = 0; lane < lane_count; lane++) in analogix_dp_process_clock_recovery()
528 dp->link_train.training_lane[lane], lane); in analogix_dp_process_clock_recovery()
600 for (lane = 0; lane < lane_count; lane++) in analogix_dp_process_equalizer_training()
[all …]
/linux/drivers/phy/rockchip/
A Dphy-rockchip-typec.c507 writel(0x7799, tcphy->base + TX_PSC_A0(lane)); in tcphy_tx_usb3_cfg_lane()
508 writel(0x7798, tcphy->base + TX_PSC_A1(lane)); in tcphy_tx_usb3_cfg_lane()
509 writel(0x5098, tcphy->base + TX_PSC_A2(lane)); in tcphy_tx_usb3_cfg_lane()
510 writel(0x5098, tcphy->base + TX_PSC_A3(lane)); in tcphy_tx_usb3_cfg_lane()
517 writel(0xa6fd, tcphy->base + RX_PSC_A0(lane)); in tcphy_rx_usb3_cfg_lane()
518 writel(0xa6fd, tcphy->base + RX_PSC_A1(lane)); in tcphy_rx_usb3_cfg_lane()
519 writel(0xa410, tcphy->base + RX_PSC_A2(lane)); in tcphy_rx_usb3_cfg_lane()
520 writel(0x2410, tcphy->base + RX_PSC_A3(lane)); in tcphy_rx_usb3_cfg_lane()
534 writel(0x6799, tcphy->base + TX_PSC_A0(lane)); in tcphy_dp_cfg_lane()
536 writel(0x98, tcphy->base + TX_PSC_A2(lane)); in tcphy_dp_cfg_lane()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/core/
A Ddc_link_dp.c661 for (lane = 0; lane < (uint32_t)(ln_count); lane++) in dp_is_ch_eq_done()
672 for (lane = 0; lane < (uint32_t)(ln_count); lane++) in dp_is_symbol_locked()
690 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) { in dp_hw_to_dpcd_lane_settings()
722 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) { in dp_decide_lane_settings()
828 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) { in maximize_lane_settings()
851 for (lane = 1; lane < LANE_COUNT_DP_MAX; lane++) { in override_lane_settings()
893 for (lane = 0; lane < in dp_get_lane_status_and_lane_adjust()
1014 for (lane = 0; lane < in dp_is_max_vs_reached()
1572 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) {
3646 for (lane = 0; lane <
[all …]
/linux/drivers/net/ethernet/ti/
A Dnetcp_xgbepcsr.c148 void __iomem *serdes_regs, int lane) in netcp_xgbe_serdes_lane_config() argument
156 (0x200 * lane), in netcp_xgbe_serdes_lane_config()
162 reg_rmw(serdes_regs + (0x200 * lane) + 0x0380, in netcp_xgbe_serdes_lane_config()
166 reg_rmw(serdes_regs + (0x200 * lane) + 0x03c0, in netcp_xgbe_serdes_lane_config()
182 void __iomem *serdes_regs, int lane) in netcp_xgbe_serdes_lane_enable() argument
185 writel(0xe0e9e038, serdes_regs + 0x1fe0 + (4 * lane)); in netcp_xgbe_serdes_lane_enable()
283 void __iomem *sig_detect_reg, int lane) in netcp_xgbe_serdes_reset_cdr() argument
289 serdes_regs, lane + 1, 5); in netcp_xgbe_serdes_reset_cdr()
298 tbus = netcp_xgbe_serdes_read_select_tbus(serdes_regs, lane + in netcp_xgbe_serdes_reset_cdr()
430 int lane, int cm, int c1, int c2) in netcp_xgbe_serdes_setup_cm_c1_c2() argument
[all …]
/linux/Documentation/devicetree/bindings/media/
A Dvideo-interfaces.yaml162 # Assume up to 9 physical lane indices
165 An array of physical data lane indexes. Position of an entry determines
167 lane, e.g. for 2-lane MIPI CSI-2 bus we could have "data-lanes = <1 2>;",
168 assuming the clock lane is on hardware lane 0. If the hardware does not
171 lane. This property is valid for serial busses only (e.g. MIPI CSI-2).
175 # Assume up to 9 physical lane indices
178 Physical clock lane index. Position of an entry determines the logical
179 lane number, while the value of an entry indicates physical lane, e.g. for
181 clock lane on hardware lane 0. This property is valid for serial busses
196 lane-polarities:
[all …]
/linux/Documentation/devicetree/bindings/media/i2c/
A Dst,st-mipid02.txt6 CSI-2 first input port is a dual lane 800Mbps per lane whereas CSI-2 second
7 input port is a single lane 800Mbps. Both ports support clock and data lane
8 polarity swap. First port also supports data lane swap.
37 - data-lanes: shall be <1> for Port 1. for Port 0 dual-lane operation shall be
38 <1 2> or <2 1>. For Port 0 single-lane operation shall be <1> or <2>.
40 - lane-polarities: any lane can be inverted or not.
/linux/drivers/pinctrl/tegra/
A Dpinctrl-tegra-xusb.c303 lane = &padctl->soc->lanes[group]; in tegra_xusb_padctl_pinmux_set()
306 if (lane->funcs[i] == function) in tegra_xusb_padctl_pinmux_set()
309 if (i >= lane->num_funcs) in tegra_xusb_padctl_pinmux_set()
313 value &= ~(lane->mask << lane->shift); in tegra_xusb_padctl_pinmux_set()
314 value |= i << lane->shift; in tegra_xusb_padctl_pinmux_set()
337 lane = &padctl->soc->lanes[group]; in tegra_xusb_padctl_pinconf_group_get()
342 if (lane->iddq == 0) in tegra_xusb_padctl_pinconf_group_get()
347 if (value & BIT(lane->iddq)) in tegra_xusb_padctl_pinconf_group_get()
385 if (lane->iddq == 0) in tegra_xusb_padctl_pinconf_group_set()
391 regval &= ~BIT(lane->iddq); in tegra_xusb_padctl_pinconf_group_set()
[all …]
/linux/arch/mips/cavium-octeon/executive/
A Dcvmx-helper-errata.c51 int lane; in __cvmx_helper_errata_qlm_disable_2nd_order_cdr() local
54 for (lane = 0; lane < 4; lane++) { in __cvmx_helper_errata_qlm_disable_2nd_order_cdr()
/linux/drivers/nvdimm/
A Dbtt.c393 arena->freelist[lane].sub = 1 - arena->freelist[lane].sub; in btt_flog_write()
394 if (++(arena->freelist[lane].seq) == 4) in btt_flog_write()
395 arena->freelist[lane].seq = 1; in btt_flog_write()
397 arena->freelist[lane].has_err = 1; in btt_flog_write()
510 if (arena->freelist[lane].has_err) { in arena_clear_freelist_error()
528 arena->freelist[lane].has_err = 0; in arena_clear_freelist_error()
1205 u32 lane = 0, premap, postmap; in btt_read_pg() local
1279 arena->rtt[lane] = RTT_INVALID; in btt_read_pg()
1290 arena->rtt[lane] = RTT_INVALID; in btt_read_pg()
1339 arena->freelist[lane].has_err = 1; in btt_write_pg()
[all …]
/linux/drivers/ata/
A Dsata_highbank.c259 u8 lane = port_data[sata_port].lane_mapping; in highbank_cphy_disable_overrides() local
265 combo_phy_write(sata_port, CPHY_RX_OVERRIDE + lane * SPHY_LANE, tmp); in highbank_cphy_disable_overrides()
270 u8 lane = port_data[sata_port].lane_mapping; in cphy_override_tx_attenuation() local
278 combo_phy_write(sata_port, CPHY_TX_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_override_tx_attenuation()
281 combo_phy_write(sata_port, CPHY_TX_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_override_tx_attenuation()
284 combo_phy_write(sata_port, CPHY_TX_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_override_tx_attenuation()
289 u8 lane = port_data[sata_port].lane_mapping; in cphy_override_rx_mode() local
293 combo_phy_write(sata_port, CPHY_RX_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_override_rx_mode()
296 combo_phy_write(sata_port, CPHY_RX_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_override_rx_mode()
313 u8 lane = port_data[sata_port].lane_mapping; in highbank_cphy_override_lane() local
[all …]
/linux/drivers/thunderbolt/
A Dlc.c52 u32 ctrl, lane; in tb_lc_set_port_configured() local
68 lane = TB_LC_SX_CTRL_L1C; in tb_lc_set_port_configured()
70 lane = TB_LC_SX_CTRL_L2C; in tb_lc_set_port_configured()
73 ctrl |= lane; in tb_lc_set_port_configured()
77 ctrl &= ~lane; in tb_lc_set_port_configured()
110 u32 ctrl, lane; in tb_lc_set_xdomain_configured() local
126 lane = TB_LC_SX_CTRL_L1D; in tb_lc_set_xdomain_configured()
128 lane = TB_LC_SX_CTRL_L2D; in tb_lc_set_xdomain_configured()
131 ctrl |= lane; in tb_lc_set_xdomain_configured()
133 ctrl &= ~lane; in tb_lc_set_xdomain_configured()
/linux/drivers/gpu/drm/gma500/
A Dcdv_intel_dp.c1251 int lane) in cdv_intel_get_adjust_request_voltage() argument
1264 int lane) in cdv_intel_get_adjust_request_pre_emphasis() argument
1283 int lane; in cdv_intel_get_adjust_train() local
1285 for (lane = 0; lane < intel_dp->lane_count; lane++) { in cdv_intel_get_adjust_train()
1301 for (lane = 0; lane < 4; lane++) in cdv_intel_get_adjust_train()
1308 int lane) in cdv_intel_get_lane_status() argument
1311 int s = (lane & 1) * 4; in cdv_intel_get_lane_status()
1321 int lane; in cdv_intel_clock_recovery_ok() local
1324 for (lane = 0; lane < lane_count; lane++) { in cdv_intel_clock_recovery_ok()
1342 int lane; in cdv_intel_channel_eq_ok() local
[all …]

Completed in 77 milliseconds

123456789