| /linux/arch/mips/mm/ |
| A D | c-r4k.c | 905 addr0 &= ~(linesz - 1); in prefetch_cache_inv()
914 addr0 += linesz; in prefetch_cache_inv()
920 addr1 -= linesz; in prefetch_cache_inv()
1186 c->icache.linesz = 64; in probe_pcache()
1191 c->dcache.linesz = 32; in probe_pcache()
1283 c->icache.linesz = 0; in probe_pcache()
1288 c->icache.linesz; in probe_pcache()
1295 c->dcache.linesz = 0; in probe_pcache()
1506 c->dcache.linesz); in probe_pcache()
1601 c->scache.linesz = 32; in loongson2_sc_init()
[all …]
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| A D | c-octeon.c | 178 c->icache.linesz = 2 << ((config1 >> 19) & 7); in probe_octeon()
183 c->icache.sets * c->icache.ways * c->icache.linesz; in probe_octeon()
185 c->dcache.linesz = 128; in probe_octeon()
192 c->dcache.sets * c->dcache.ways * c->dcache.linesz; in probe_octeon()
198 c->icache.linesz = 2 << ((config1 >> 19) & 7); in probe_octeon()
202 icache_size = c->icache.sets * c->icache.ways * c->icache.linesz; in probe_octeon()
204 c->dcache.linesz = 128; in probe_octeon()
212 c->icache.linesz = 128; in probe_octeon()
218 c->dcache.linesz = 128; in probe_octeon()
243 c->icache.ways, c->icache.sets, c->icache.linesz); in probe_octeon()
[all …]
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| A D | c-tx39.c | 299 current_cpu_data.icache.linesz = 16; in tx39_probe_cache()
304 current_cpu_data.dcache.linesz = 4; in tx39_probe_cache()
310 current_cpu_data.dcache.linesz = 16; in tx39_probe_cache()
317 current_cpu_data.dcache.linesz = 16; in tx39_probe_cache()
396 current_cpu_data.icache.waysize / current_cpu_data.icache.linesz; in tx39_cache_init()
398 current_cpu_data.dcache.waysize / current_cpu_data.dcache.linesz; in tx39_cache_init()
407 icache_size >> 10, current_cpu_data.icache.linesz); in tx39_cache_init()
409 dcache_size >> 10, current_cpu_data.dcache.linesz); in tx39_cache_init()
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| A D | sc-mips.c | 143 c->scache.linesz = 2 << tmp; in mips_sc_is_activated()
166 c->scache.linesz = 2 << line_sz; in mips_sc_probe_cm3()
171 c->scache.waysize = c->scache.sets * c->scache.linesz; in mips_sc_probe_cm3()
174 if (c->scache.linesz) { in mips_sc_probe_cm3()
247 c->scache.waysize = c->scache.sets * c->scache.linesz; in mips_sc_probe()
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| A D | sc-rm7k.c | 237 c->scache.linesz = sc_lsize; in rm7k_sc_init()
241 c->scache.sets = scache_size / (c->scache.linesz * c->scache.ways); in rm7k_sc_init()
267 c->tcache.linesz = tc_lsize; in rm7k_sc_init()
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| /linux/arch/sh/kernel/cpu/sh4/ |
| A D | probe.c | 39 boot_cpu_data.icache.linesz = L1_CACHE_BYTES; in cpu_probe()
48 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; in cpu_probe()
245 boot_cpu_data.scache.linesz = L1_CACHE_BYTES; in cpu_probe()
249 boot_cpu_data.scache.linesz); in cpu_probe()
252 (boot_cpu_data.scache.linesz * in cpu_probe()
257 boot_cpu_data.scache.linesz); in cpu_probe()
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| /linux/arch/sh/kernel/cpu/ |
| A D | init.c | 155 addr += current_cpu_data.dcache.linesz) in cache_init()
200 CSHAPE((desc).way_size * (desc).ways, ilog2((desc).linesz), (desc).ways)
307 current_cpu_data.icache.linesz; in cpu_init()
310 current_cpu_data.icache.linesz; in cpu_init()
314 current_cpu_data.dcache.linesz; in cpu_init()
317 current_cpu_data.dcache.linesz; in cpu_init()
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| A D | proc.c | 70 cache_size = info.ways * info.sets * info.linesz; in show_cacheinfo()
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| /linux/arch/sh/kernel/cpu/sh2/ |
| A D | probe.c | 38 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; in cpu_probe()
59 boot_cpu_data.dcache.linesz = 32; in cpu_probe()
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| /linux/arch/sh/mm/ |
| A D | cache-sh7705.c | 46 addr += current_cpu_data.dcache.linesz) { in cache_wback_all()
114 addr += current_cpu_data.dcache.linesz) { in __flush_dcache_page()
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| A D | cache-debugfs.c | 76 addr += cache->linesz, line++) { in cache_debugfs_show()
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| /linux/arch/mips/kernel/ |
| A D | cacheinfo.c | 12 leaf->coherency_line_size = c->cache.linesz; \
15 leaf->size = c->cache.linesz * c->cache.sets * \
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| A D | pm-cps.c | 221 uasm_i_addiu(pp, t0, t0, cache->linesz); in cps_gen_cache_routine()
223 uasm_i_cache(pp, op, i * cache->linesz, t0); in cps_gen_cache_routine()
229 uasm_i_addiu(pp, t0, t0, unroll_lines * cache->linesz); in cps_gen_cache_routine()
244 unsigned line_size = cpu_info->dcache.linesz; in cps_gen_flush_fsb()
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| A D | traps.c | 646 regs->regs[rt] = min(current_cpu_data.dcache.linesz, in simulate_rdhwr()
647 current_cpu_data.icache.linesz); in simulate_rdhwr()
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| /linux/arch/mips/include/asm/ |
| A D | cpu-features.h | 491 #define cpu_dcache_line_size() cpu_data[0].dcache.linesz
494 #define cpu_icache_line_size() cpu_data[0].icache.linesz
497 #define cpu_scache_line_size() cpu_data[0].scache.linesz
500 #define cpu_tcache_line_size() cpu_data[0].tcache.linesz
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| A D | cpu-info.h | 27 unsigned char linesz; /* Size of line in bytes */ member
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| /linux/arch/sh/include/asm/ |
| A D | cache.h | 23 unsigned int linesz; /* Cache line size (bytes) */ member
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| /linux/tools/perf/util/ |
| A D | namespaces.c | 73 size_t linesz = 0; in nsinfo__init() local
107 while (getline(&statln, &linesz, f) != -1) { in nsinfo__init()
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| /linux/tools/perf/ui/stdio/ |
| A D | hist.c | 825 size_t linesz; in hists__fprintf() local
842 linesz = hists__sort_list_width(hists) + 3 + 1; in hists__fprintf()
843 linesz += perf_hpp__color_overhead(); in hists__fprintf()
844 line = malloc(linesz); in hists__fprintf()
868 ret += hist_entry__fprintf(h, max_cols, line, linesz, fp, ignore_callchains); in hists__fprintf()
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| /linux/arch/sh/kernel/cpu/sh2a/ |
| A D | probe.c | 47 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; in cpu_probe()
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| /linux/arch/mips/txx9/generic/ |
| A D | setup.c | 155 unsigned int linesz = 32; in early_flush_dcache() local
160 for (addr = INDEX_BASE; addr < end; addr += linesz) { in early_flush_dcache()
204 unsigned int linesz = 16; in early_flush_dcache() local
209 for (addr = INDEX_BASE; addr < end; addr += linesz) { in early_flush_dcache()
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| /linux/drivers/soc/bcm/brcmstb/pm/ |
| A D | pm-mips.c | 227 brcm_pm_do_s3(ctrl.aon_ctrl_base, current_cpu_data.dcache.linesz); in brcmstb_pm_s3()
270 s2_params[3] = (u32)current_cpu_data.icache.linesz; in brcmstb_pm_s2()
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| /linux/arch/sh/kernel/cpu/sh3/ |
| A D | probe.c | 52 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; in cpu_probe()
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| /linux/arch/arm64/include/asm/ |
| A D | assembler.h | 393 .macro dcache_by_myline_op op, domain, start, end, linesz, tmp, fixup
394 sub \tmp, \linesz, #1
414 add \start, \start, \linesz
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