Searched refs:mmUVD_CONTEXT_ID (Results 1 – 16 of 16) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | uvd_v3_1.c | 115 amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0)); in uvd_v3_1_ring_emit_fence()
146 WREG32(mmUVD_CONTEXT_ID, 0xCAFEDEAD); in uvd_v3_1_ring_test_ring()
151 amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0)); in uvd_v3_1_ring_test_ring()
155 tmp = RREG32(mmUVD_CONTEXT_ID); in uvd_v3_1_ring_test_ring()
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| A D | uvd_v4_2.c | 477 amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0)); in uvd_v4_2_ring_emit_fence()
508 WREG32(mmUVD_CONTEXT_ID, 0xCAFEDEAD); in uvd_v4_2_ring_test_ring()
513 amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0)); in uvd_v4_2_ring_test_ring()
517 tmp = RREG32(mmUVD_CONTEXT_ID); in uvd_v4_2_ring_test_ring()
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| A D | uvd_v5_0.c | 493 amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0)); in uvd_v5_0_ring_emit_fence()
524 WREG32(mmUVD_CONTEXT_ID, 0xCAFEDEAD); in uvd_v5_0_ring_test_ring()
528 amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0)); in uvd_v5_0_ring_test_ring()
532 tmp = RREG32(mmUVD_CONTEXT_ID); in uvd_v5_0_ring_test_ring()
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| A D | uvd_v6_0.c | 924 amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0)); in uvd_v6_0_ring_emit_fence()
987 WREG32(mmUVD_CONTEXT_ID, 0xCAFEDEAD); in uvd_v6_0_ring_test_ring()
992 amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0)); in uvd_v6_0_ring_test_ring()
996 tmp = RREG32(mmUVD_CONTEXT_ID); in uvd_v6_0_ring_test_ring()
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| A D | uvd_v7_0.c | 1182 PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_CONTEXT_ID), 0)); in uvd_v7_0_ring_emit_fence()
1252 WREG32_SOC15(UVD, ring->me, mmUVD_CONTEXT_ID, 0xCAFEDEAD); in uvd_v7_0_ring_test_ring()
1258 PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_CONTEXT_ID), 0)); in uvd_v7_0_ring_test_ring()
1262 tmp = RREG32_SOC15(UVD, ring->me, mmUVD_CONTEXT_ID); in uvd_v7_0_ring_test_ring()
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| A D | vcn_v1_0.c | 1468 PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_CONTEXT_ID), 0)); in vcn_v1_0_dec_ring_emit_fence()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| A D | uvd_4_0_d.h | 38 #define mmUVD_CONTEXT_ID 0x3DBD macro
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| A D | uvd_4_2_d.h | 81 #define mmUVD_CONTEXT_ID 0x3dbd macro
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| A D | uvd_3_1_d.h | 83 #define mmUVD_CONTEXT_ID 0x3dbd macro
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| A D | uvd_5_0_d.h | 87 #define mmUVD_CONTEXT_ID 0x3dbd macro
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| A D | uvd_6_0_d.h | 103 #define mmUVD_CONTEXT_ID 0x3dbd macro
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| A D | uvd_7_0_offset.h | 218 #define mmUVD_CONTEXT_ID … macro
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| /linux/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| A D | vcn_1_0_offset.h | 404 #define mmUVD_CONTEXT_ID … macro
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| A D | vcn_2_5_offset.h | 545 #define mmUVD_CONTEXT_ID … macro
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| A D | vcn_2_0_0_offset.h | 726 #define mmUVD_CONTEXT_ID … macro
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| A D | vcn_3_0_0_offset.h | 875 #define mmUVD_CONTEXT_ID … macro
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