Searched refs:mmUVD_LMI_CTRL (Results 1 – 19 of 19) sorted by relevance
| /linux/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| A D | uvd_4_0_d.h | 47 #define mmUVD_LMI_CTRL 0x3D66 macro
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| A D | uvd_4_2_d.h | 49 #define mmUVD_LMI_CTRL 0x3d66 macro
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| A D | uvd_3_1_d.h | 51 #define mmUVD_LMI_CTRL 0x3d66 macro
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| A D | uvd_5_0_d.h | 55 #define mmUVD_LMI_CTRL 0x3d66 macro
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| A D | uvd_6_0_d.h | 71 #define mmUVD_LMI_CTRL 0x3d66 macro
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| A D | uvd_7_0_offset.h | 158 #define mmUVD_LMI_CTRL … macro
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| /linux/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| A D | vcn_1_0_offset.h | 336 #define mmUVD_LMI_CTRL … macro
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| A D | vcn_2_5_offset.h | 959 #define mmUVD_LMI_CTRL … macro
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| A D | vcn_2_0_0_offset.h | 562 #define mmUVD_LMI_CTRL … macro
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| A D | vcn_3_0_0_offset.h | 1473 #define mmUVD_LMI_CTRL … macro
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | vcn_v1_0.c | 801 tmp = RREG32_SOC15(UVD, 0, mmUVD_LMI_CTRL); in vcn_v1_0_start_spg_mode()
802 WREG32_SOC15(UVD, 0, mmUVD_LMI_CTRL, tmp | in vcn_v1_0_start_spg_mode()
983 WREG32_SOC15_DPG_MODE_1_0(UVD, 0, mmUVD_LMI_CTRL, in vcn_v1_0_start_dpg_mode()
1038 WREG32_SOC15_DPG_MODE_1_0(UVD, 0, mmUVD_LMI_CTRL, in vcn_v1_0_start_dpg_mode()
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| A D | vcn_v2_5.c | 800 VCN, 0, mmUVD_LMI_CTRL), tmp, 0, indirect); in vcn_v2_5_start_dpg_mode()
946 tmp = RREG32_SOC15(VCN, i, mmUVD_LMI_CTRL); in vcn_v2_5_start()
948 WREG32_SOC15(VCN, i, mmUVD_LMI_CTRL, tmp | 0x8| in vcn_v2_5_start()
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| A D | vcn_v2_0.c | 826 UVD, 0, mmUVD_LMI_CTRL), tmp, 0, indirect); in vcn_v2_0_start_dpg_mode()
954 tmp = RREG32_SOC15(UVD, 0, mmUVD_LMI_CTRL); in vcn_v2_0_start()
955 WREG32_SOC15(UVD, 0, mmUVD_LMI_CTRL, tmp | in vcn_v2_0_start()
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| A D | uvd_v3_1.c | 355 WREG32(mmUVD_LMI_CTRL, 0x40 | (1 << 8) | (1 << 13) | in uvd_v3_1_start()
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| A D | uvd_v4_2.c | 312 WREG32(mmUVD_LMI_CTRL, 0x203108); in uvd_v4_2_start()
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| A D | uvd_v5_0.c | 352 WREG32(mmUVD_LMI_CTRL, 0x40 | (1 << 8) | (1 << 13) | in uvd_v5_0_start()
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| A D | vcn_v3_0.c | 966 VCN, inst_idx, mmUVD_LMI_CTRL), tmp, 0, indirect); in vcn_v3_0_start_dpg_mode()
1125 tmp = RREG32_SOC15(VCN, i, mmUVD_LMI_CTRL); in vcn_v3_0_start()
1126 WREG32_SOC15(VCN, i, mmUVD_LMI_CTRL, tmp | in vcn_v3_0_start()
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| A D | uvd_v7_0.c | 885 MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_LMI_CTRL), in uvd_v7_0_sriov_start()
1000 WREG32_SOC15(UVD, k, mmUVD_LMI_CTRL, in uvd_v7_0_start()
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| A D | uvd_v6_0.c | 761 WREG32(mmUVD_LMI_CTRL, in uvd_v6_0_start()
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Completed in 56 milliseconds