Searched refs:pixclks_cntl (Results 1 – 5 of 5) sorted by relevance
| /linux/drivers/gpu/drm/radeon/ |
| A D | radeon_legacy_crtc.c | 854 uint32_t pixclks_cntl = ((RREG32_PLL(RADEON_PIXCLKS_CNTL) & in radeon_set_pll() local
861 &pixclks_cntl); in radeon_set_pll()
916 WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); in radeon_set_pll()
918 uint32_t pixclks_cntl; in radeon_set_pll() local
922 pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL); in radeon_set_pll()
924 &pll_fb_post_div, &pixclks_cntl); in radeon_set_pll()
1022 WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); in radeon_set_pll()
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| A D | radeon_legacy_tv.c | 873 uint32_t *ppll_div_3, uint32_t *pixclks_cntl) in radeon_legacy_tv_adjust_pll1() argument
887 *pixclks_cntl &= ~(RADEON_PIX2CLK_SRC_SEL_MASK | RADEON_PIXCLK_TV_SRC_SEL); in radeon_legacy_tv_adjust_pll1()
888 *pixclks_cntl |= RADEON_PIX2CLK_SRC_SEL_P2PLLCLK; in radeon_legacy_tv_adjust_pll1()
893 uint32_t *p2pll_div_0, uint32_t *pixclks_cntl) in radeon_legacy_tv_adjust_pll2() argument
907 *pixclks_cntl &= ~RADEON_PIX2CLK_SRC_SEL_MASK; in radeon_legacy_tv_adjust_pll2()
908 *pixclks_cntl |= RADEON_PIX2CLK_SRC_SEL_P2PLLCLK | RADEON_PIXCLK_TV_SRC_SEL; in radeon_legacy_tv_adjust_pll2()
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| A D | radeon_legacy_encoders.c | 59 uint32_t lvds_gen_cntl, lvds_pll_cntl, pixclks_cntl, disp_pwr_man; in radeon_legacy_lvds_update() local
118 pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL); in radeon_legacy_lvds_update()
131 WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); in radeon_legacy_lvds_update()
1538 uint32_t gpiopad_a = 0, pixclks_cntl, tmp; in radeon_legacy_tv_dac_detect() local
1584 pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL); in radeon_legacy_tv_dac_detect()
1601 tmp = pixclks_cntl & ~(RADEON_PIX2CLK_ALWAYS_ONb in radeon_legacy_tv_dac_detect()
1677 WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); in radeon_legacy_tv_dac_detect()
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| A D | radeon_mode.h | 967 uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
970 uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
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| /linux/drivers/video/fbdev/aty/ |
| A D | radeon_pm.c | 831 u32 pixclks_cntl; in radeon_pm_setup_for_suspend() local
899 pixclks_cntl = INPLL( pllPIXCLKS_CNTL); in radeon_pm_setup_for_suspend()
900 pixclks_cntl &= ~( PIXCLKS_CNTL__PIXCLK_GV_ALWAYS_ONb | in radeon_pm_setup_for_suspend()
908 OUTPLL( pllPIXCLKS_CNTL, pixclks_cntl); in radeon_pm_setup_for_suspend()
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