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Searched refs:rFPGA0_XA_LSSIParameter (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/staging/rtl8192u/
A Dr819xU_phyreg.h18 #define rFPGA0_XA_LSSIParameter 0x840 macro
A Dr819xU_phy.c588 priv->PHYRegDef[RF90_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; in rtl8192_InitBBRFRegDef()
/linux/drivers/staging/rtl8192e/rtl8192e/
A Dr8192E_phyreg.h61 #define rFPGA0_XA_LSSIParameter 0x840 macro
A Dr8192E_phy.c402 priv->PHYRegDef[RF90_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; in _rtl92e_init_bb_rf_reg_def()
/linux/drivers/staging/rtl8712/
A Drtl871x_mp_phy_regdef.h101 #define rFPGA0_XA_LSSIParameter 0x840 macro
/linux/drivers/staging/r8188eu/hal/
A DHalPhyRf_8188e.c847 ODM_SetBBReg(dm_odm, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000); in phy_IQCalibrate_8188E()
923 ODM_SetBBReg(dm_odm, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3); in phy_IQCalibrate_8188E()
A Drtl8188e_phycfg.c413 pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; /* LSSI Parameter */ in phy_InitBBRFRegisterDefinition()
/linux/drivers/staging/rtl8723bs/include/
A DHal8192CPhyReg.h113 #define rFPGA0_XA_LSSIParameter 0x840 macro
/linux/drivers/staging/r8188eu/include/
A DHal8188EPhyReg.h69 #define rFPGA0_XA_LSSIParameter 0x840 macro
/linux/drivers/staging/rtl8723bs/hal/
A Drtl8723b_phycfg.c322 pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; /* LSSI Parameter */ in phy_InitBBRFRegisterDefinition()

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