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Searched refs:rcg (Results 1 – 25 of 33) sorted by relevance

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/linux/drivers/clk/qcom/
A Dclk-rcg.c44 ret = regmap_read(rcg->clkr.regmap, rcg->ns_reg, &ns); in clk_rcg_get_parent()
99 regmap_read(rcg->clkr.regmap, rcg->ns_reg, &ns); in clk_rcg_set_parent()
101 regmap_write(rcg->clkr.regmap, rcg->ns_reg, ns); in clk_rcg_set_parent()
246 if (rcg->ns_reg[0] != rcg->ns_reg[1]) { in configure_bank()
348 regmap_read(rcg->clkr.regmap, rcg->ns_reg, &ns); in clk_rcg_recalc_rate()
352 regmap_read(rcg->clkr.regmap, rcg->md_reg, &md); in clk_rcg_recalc_rate()
356 if (rcg->clkr.enable_reg != rcg->ns_reg) in clk_rcg_recalc_rate()
388 if (rcg->ns_reg[0] != rcg->ns_reg[1]) in clk_dyn_rcg_recalc_rate()
496 if (rcg->clkr.enable_reg != rcg->ns_reg) { in __clk_rcg_set_rate()
509 regmap_write(rcg->clkr.regmap, rcg->ns_reg, ns); in __clk_rcg_set_rate()
[all …]
A Dclk-rcg2.c45 #define RCG_CFG_OFFSET(rcg) ((rcg)->cmd_rcgr + (rcg)->cfg_off + CFG_REG) argument
46 #define RCG_M_OFFSET(rcg) ((rcg)->cmd_rcgr + (rcg)->cfg_off + M_REG) argument
47 #define RCG_N_OFFSET(rcg) ((rcg)->cmd_rcgr + (rcg)->cfg_off + N_REG) argument
48 #define RCG_D_OFFSET(rcg) ((rcg)->cmd_rcgr + (rcg)->cfg_off + D_REG) argument
171 regmap_read(rcg->clkr.regmap, RCG_CFG_OFFSET(rcg), &cfg); in clk_rcg2_recalc_rate()
175 regmap_read(rcg->clkr.regmap, RCG_M_OFFSET(rcg), &m); in clk_rcg2_recalc_rate()
177 regmap_read(rcg->clkr.regmap, RCG_N_OFFSET(rcg), &n); in clk_rcg2_recalc_rate()
373 regmap_read(rcg->clkr.regmap, RCG_M_OFFSET(rcg), &m); in clk_rcg2_get_duty_cycle()
409 regmap_read(rcg->clkr.regmap, RCG_M_OFFSET(rcg), &m); in clk_rcg2_set_duty_cycle()
875 struct clk_rcg2 *rcg = &cgfx->rcg; in clk_gfx3d_set_rate_and_parent() local
[all …]
A Dclk-rcg.h158 struct clk_rcg2 rcg; member
163 container_of(to_clk_rcg2(_hw), struct clk_rcg2_gfx3d, rcg)
176 struct clk_rcg2 *rcg; member
181 { .rcg = &r, .init = &r##_init }
A Dgpucc-sdm660.c108 .rcg = {
139 .hw = &gfx3d_clk_src.rcg.clkr.hw,
276 [GFX3D_CLK_SRC] = &gfx3d_clk_src.rcg.clkr,
A D.clk-rcg.o.cmd1rcg.o := /usr/bin/ccache /home/test/workspace/code/optee_3.16/build/../toolchains/aarch64/bin/aarc…
3 source_drivers/clk/qcom/clk-rcg.o := drivers/clk/qcom/clk-rcg.c
5 deps_drivers/clk/qcom/clk-rcg.o := \
798 drivers/clk/qcom/clk-rcg.h \
802 drivers/clk/qcom/clk-rcg.o: $(deps_drivers/clk/qcom/clk-rcg.o)
804 $(deps_drivers/clk/qcom/clk-rcg.o):
A Dbuilt-in.a7 clk-rcg.o/
A D.built-in.a.cmd1 …s/clk/qcom/clk-alpha-pll.o drivers/clk/qcom/clk-pll.o drivers/clk/qcom/clk-rcg.o drivers/clk/qcom/…
A DMakefile8 clk-qcom-y += clk-rcg.o
A Dmmcc-msm8996.c532 .rcg = {
3099 [GFX3D_CLK_SRC] = &gfx3d_clk_src.rcg.clkr,
A D.clk-rcg2.o.cmd814 drivers/clk/qcom/clk-rcg.h \
A D.common.o.cmd987 drivers/clk/qcom/clk-rcg.h \
A D.dispcc-sdm845.o.cmd990 drivers/clk/qcom/clk-rcg.h \
A D.dispcc-sm8250.o.cmd991 drivers/clk/qcom/clk-rcg.h \
A D.gcc-ipq6018.o.cmd1002 drivers/clk/qcom/clk-rcg.h \
A D.gcc-msm8916.o.cmd1002 drivers/clk/qcom/clk-rcg.h \
A D.gcc-msm8998.o.cmd1002 drivers/clk/qcom/clk-rcg.h \
A D.gcc-sdm845.o.cmd1002 drivers/clk/qcom/clk-rcg.h \
A D.gcc-sm8250.o.cmd999 drivers/clk/qcom/clk-rcg.h \
A D.mmcc-msm8996.o.cmd1005 drivers/clk/qcom/clk-rcg.h \
A D.videocc-sdm845.o.cmd989 drivers/clk/qcom/clk-rcg.h \
A D.gcc-ipq8074.o.cmd999 drivers/clk/qcom/clk-rcg.h \
A D.gcc-msm8994.o.cmd1001 drivers/clk/qcom/clk-rcg.h \
A D.gcc-msm8996.o.cmd1002 drivers/clk/qcom/clk-rcg.h \
A D.gcc-qcs404.o.cmd991 drivers/clk/qcom/clk-rcg.h \
/linux/drivers/clk/
A Dbuilt-in.a174 qcom/clk-rcg.o/

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