Searched refs:reg_val_offs (Results 1 – 6 of 6) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | amdgpu_gfx.c | 729 uint32_t seq, reg_val_offs = 0, value = 0; in amdgpu_kiq_rreg() local
739 if (amdgpu_device_wb_get(adev, ®_val_offs)) { in amdgpu_kiq_rreg()
744 amdgpu_ring_emit_rreg(ring, reg, reg_val_offs); in amdgpu_kiq_rreg()
775 value = adev->wb.wb[reg_val_offs]; in amdgpu_kiq_rreg()
776 amdgpu_device_wb_free(adev, reg_val_offs); in amdgpu_kiq_rreg()
784 if (reg_val_offs) in amdgpu_kiq_rreg()
785 amdgpu_device_wb_free(adev, reg_val_offs); in amdgpu_kiq_rreg()
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| A D | amdgpu_virt.h | 217 uint32_t reg_val_offs; member
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| A D | amdgpu_ring.h | 194 uint32_t reg_val_offs);
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| A D | gfx_v9_0.c | 4175 uint32_t seq, reg_val_offs = 0; in gfx_v9_0_kiq_read_clock() local
4183 if (amdgpu_device_wb_get(adev, ®_val_offs)) { in gfx_v9_0_kiq_read_clock()
4196 reg_val_offs * 4)); in gfx_v9_0_kiq_read_clock()
4198 reg_val_offs * 4)); in gfx_v9_0_kiq_read_clock()
4229 value = (uint64_t)adev->wb.wb[reg_val_offs] | in gfx_v9_0_kiq_read_clock()
4231 amdgpu_device_wb_free(adev, reg_val_offs); in gfx_v9_0_kiq_read_clock()
4239 if (reg_val_offs) in gfx_v9_0_kiq_read_clock()
4240 amdgpu_device_wb_free(adev, reg_val_offs); in gfx_v9_0_kiq_read_clock()
5673 uint32_t reg_val_offs) in gfx_v9_0_ring_emit_rreg() argument
5684 reg_val_offs * 4)); in gfx_v9_0_ring_emit_rreg()
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| A D | gfx_v8_0.c | 6399 uint32_t reg_val_offs) in gfx_v8_0_ring_emit_rreg() argument
6410 reg_val_offs * 4)); in gfx_v8_0_ring_emit_rreg()
6412 reg_val_offs * 4)); in gfx_v8_0_ring_emit_rreg()
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| A D | gfx_v10_0.c | 8923 uint32_t reg_val_offs) in gfx_v10_0_ring_emit_rreg() argument
8934 reg_val_offs * 4)); in gfx_v10_0_ring_emit_rreg()
8936 reg_val_offs * 4)); in gfx_v10_0_ring_emit_rreg()
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