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Searched refs:scr_addr (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/ata/
A Dsata_sis.c154 void __iomem *base = ap->ioaddr.scr_addr + link->pmp * 0x10; in sis_scr_read()
169 void __iomem *base = ap->ioaddr.scr_addr + link->pmp * 0x10; in sis_scr_write()
288 host->ports[0]->ioaddr.scr_addr = mmio; in sis_init_one()
289 host->ports[1]->ioaddr.scr_addr = mmio + port2_start; in sis_init_one()
A Dsata_promise.c348 void __iomem *sata_mmio = ap->ioaddr.scr_addr; in pdc_sata_port_start()
361 void __iomem *sata_mmio = ap->ioaddr.scr_addr; in pdc_fpdma_clear_interrupt_flag()
376 void __iomem *sata_mmio = ap->ioaddr.scr_addr; in pdc_fpdma_reset()
394 void __iomem *sata_mmio = ap->ioaddr.scr_addr; in pdc_not_at_command_packet_phase()
410 void __iomem *sata_mmio = ap->ioaddr.scr_addr; in pdc_clear_internal_debug_record_error_register()
466 *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4)); in pdc_sata_scr_read()
475 writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4)); in pdc_sata_scr_write()
1090 void __iomem *base, void __iomem *scr_addr) in pdc_ata_setup_port() argument
1105 ap->ioaddr.scr_addr = scr_addr; in pdc_ata_setup_port()
A Dsata_via.c189 *val = ioread32(link->ap->ioaddr.scr_addr + (4 * sc_reg)); in svia_scr_read()
197 iowrite32(val, link->ap->ioaddr.scr_addr + (4 * sc_reg)); in svia_scr_write()
448 ioaddr->scr_addr = vt6421_scr_addr(iomap[5], ap->port_no); in vt6421_init_addrs()
478 host->ports[0]->ioaddr.scr_addr = svia_scr_addr(host->iomap[5], 0); in vt6420_prepare_host()
479 host->ports[1]->ioaddr.scr_addr = svia_scr_addr(host->iomap[5], 1); in vt6420_prepare_host()
A Dsata_nv.c1521 *val = ioread32(link->ap->ioaddr.scr_addr + (sc_reg * 4)); in nv_scr_read()
1530 iowrite32(val, link->ap->ioaddr.scr_addr + (sc_reg * 4)); in nv_scr_write()
1568 void __iomem *scr_addr = ap->host->ports[0]->ioaddr.scr_addr; in nv_nf2_freeze() local
1572 mask = ioread8(scr_addr + NV_INT_ENABLE); in nv_nf2_freeze()
1574 iowrite8(mask, scr_addr + NV_INT_ENABLE); in nv_nf2_freeze()
1579 void __iomem *scr_addr = ap->host->ports[0]->ioaddr.scr_addr; in nv_nf2_thaw() local
1583 iowrite8(NV_INT_ALL << shift, scr_addr + NV_INT_STATUS); in nv_nf2_thaw()
1585 mask = ioread8(scr_addr + NV_INT_ENABLE); in nv_nf2_thaw()
1587 iowrite8(mask, scr_addr + NV_INT_ENABLE); in nv_nf2_thaw()
1954 pp->sactive_block = ap->ioaddr.scr_addr + 4 * SCR_ACTIVE; in nv_swncq_port_start()
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A Dsata_vsc.c89 *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4)); in vsc_sata_scr_read()
99 writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4)); in vsc_sata_scr_write()
314 port->scr_addr = base + VSC_SATA_SCR_STATUS_OFFSET; in vsc_sata_setup_port()
A Dsata_svw.c110 *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4)); in k2_sata_scr_read()
120 writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4)); in k2_sata_scr_write()
405 port->scr_addr = base + K2_SATA_SCR_STATUS_OFFSET; in k2_sata_setup_port()
A Dsata_inic162x.c293 void __iomem *scr_addr = inic_port_base(link->ap) + PORT_SCR; in inic_scr_read() local
298 *val = readl(scr_addr + scr_map[sc_reg] * 4); in inic_scr_read()
308 void __iomem *scr_addr = inic_port_base(link->ap) + PORT_SCR; in inic_scr_write() local
313 writel(val, scr_addr + scr_map[sc_reg] * 4); in inic_scr_write()
A Dsata_qstor.c218 *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 8)); in qs_scr_read()
232 writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 8)); in qs_scr_write()
464 port->scr_addr = base + 0xc00; in qs_ata_setup_port()
A Dsata_sil24.c502 void __iomem *scr_addr = sil24_port_base(link->ap) + PORT_SCONTROL; in sil24_scr_read() local
505 *val = readl(scr_addr + sil24_scr_map[sc_reg] * 4); in sil24_scr_read()
513 void __iomem *scr_addr = sil24_port_base(link->ap) + PORT_SCONTROL; in sil24_scr_write() local
516 writel(val, scr_addr + sil24_scr_map[sc_reg] * 4); in sil24_scr_write()
A Dsata_rcar.c513 *val = ioread32(link->ap->ioaddr.scr_addr + (sc_reg << 2)); in sata_rcar_scr_read()
523 iowrite32(val, link->ap->ioaddr.scr_addr + (sc_reg << 2)); in sata_rcar_scr_write()
773 ioaddr->scr_addr = base + SCRSSTS_REG; in sata_rcar_setup_port()
A Dpata_hpt3x3.c237 ioaddr->scr_addr = NULL; in hpt3x3_init_one()
A Dsata_sil.c381 void __iomem *offset = ap->ioaddr.scr_addr; in sil_scr_addr()
776 ioaddr->scr_addr = mmio_base + sil_port[i].scr; in sil_init_one()
A Dsata_dwc_460ex.c412 *val = sata_dwc_readl(link->ap->ioaddr.scr_addr + (scr * 4)); in sata_dwc_scr_read()
428 sata_dwc_writel(link->ap->ioaddr.scr_addr + (scr * 4), val); in sata_dwc_scr_write()
1243 host->ports[0]->ioaddr.scr_addr = base + SATA_DWC_SCR_OFFSET; in sata_dwc_probe()
/linux/arch/mips/include/asm/octeon/
A Dcvmx-fpa.h202 static inline void cvmx_fpa_async_alloc(uint64_t scr_addr, uint64_t pool) in cvmx_fpa_async_alloc() argument
210 data.s.scraddr = scr_addr >> 3; in cvmx_fpa_async_alloc()
A Dcvmx-pow.h1438 static inline void cvmx_pow_work_request_async_nocheck(int scr_addr, in cvmx_pow_work_request_async_nocheck() argument
1447 data.s.scraddr = scr_addr >> 3; in cvmx_pow_work_request_async_nocheck()
1467 static inline void cvmx_pow_work_request_async(int scr_addr, in cvmx_pow_work_request_async() argument
1475 cvmx_pow_work_request_async_nocheck(scr_addr, wait); in cvmx_pow_work_request_async()
1488 static inline struct cvmx_wqe *cvmx_pow_work_response_async(int scr_addr) in cvmx_pow_work_response_async() argument
1493 result.u64 = cvmx_scratch_read64(scr_addr); in cvmx_pow_work_response_async()
/linux/drivers/staging/octeon/
A Docteon-stubs.h1344 static inline void cvmx_pow_work_request_async_nocheck(int scr_addr, in cvmx_pow_work_request_async_nocheck() argument
1348 static inline void cvmx_pow_work_request_async(int scr_addr, in cvmx_pow_work_request_async() argument
1352 static inline struct cvmx_wqe *cvmx_pow_work_response_async(int scr_addr) in cvmx_pow_work_response_async() argument
1354 struct cvmx_wqe *wqe = (void *)(unsigned long)scr_addr; in cvmx_pow_work_response_async()
/linux/include/linux/
A Dlibata.h602 void __iomem *scr_addr; member

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