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Searched refs:set_mask (Results 1 – 25 of 27) sorted by relevance

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/linux/arch/arm64/mm/
A Dpageattr.c16 pgprot_t set_mask; member
33 pte = set_pte_bit(pte, cdata->set_mask); in change_page_range()
43 pgprot_t set_mask, pgprot_t clear_mask) in __change_memory_common() argument
48 data.set_mask = set_mask; in __change_memory_common()
59 pgprot_t set_mask, pgprot_t clear_mask) in change_memory_common() argument
99 if (rodata_full && (pgprot_val(set_mask) == PTE_RDONLY || in change_memory_common()
103 PAGE_SIZE, set_mask, clear_mask); in change_memory_common()
113 return __change_memory_common(start, size, set_mask, clear_mask); in change_memory_common()
159 .set_mask = __pgprot(0), in set_direct_map_invalid_noflush()
174 .set_mask = __pgprot(PTE_VALID | PTE_WRITE), in set_direct_map_default_noflush()
/linux/drivers/hwmon/
A Dlm75.c81 u8 set_mask; member
133 .set_mask = 2 << 5, /* 11-bit mode */
142 .set_mask = 2 << 5, /* 11-bit mode */
151 .set_mask = 2 << 5, /* 11-bit mode */
163 .set_mask = 3 << 5, /* 12-bit mode*/
213 .set_mask = 3 << 5, /* 12-bit mode */
223 .set_mask = 3 << 5, /* 12-bit mode */
232 .set_mask = 3 << 5, /* 12-bit mode */
241 .set_mask = 3 << 5, /* 12-bit mode */
258 .set_mask = 3 << 5, /* 12-bit mode */
[all …]
A Dmax31730.c61 static int max31730_write_config(struct max31730_data *data, u8 set_mask, in max31730_write_config() argument
68 value |= set_mask; in max31730_write_config()
/linux/arch/arm/mm/
A Dpageattr.c12 pgprot_t set_mask; member
22 pte = set_pte_bit(pte, cdata->set_mask); in change_page_range()
36 pgprot_t set_mask, pgprot_t clear_mask) in change_memory_common() argument
53 data.set_mask = set_mask; in change_memory_common()
/linux/arch/riscv/mm/
A Dpageattr.c13 pgprot_t set_mask; member
23 new_val |= (pgprot_val(masks->set_mask)); in set_pageattr_masks()
107 static int __set_memory(unsigned long addr, int numpages, pgprot_t set_mask, in __set_memory() argument
114 .set_mask = set_mask, in __set_memory()
165 .set_mask = __pgprot(0), in set_direct_map_invalid_noflush()
182 .set_mask = PAGE_KERNEL, in set_direct_map_default_noflush()
/linux/drivers/gpio/
A Dgpio-mmio.c151 unsigned long set_mask = 0; in bgpio_get_set_multiple() local
156 set_mask = *mask & gc->bgpio_dir; in bgpio_get_set_multiple()
159 if (set_mask) in bgpio_get_set_multiple()
265 unsigned long *set_mask, in bgpio_multiple_get_masks() argument
270 *set_mask = 0; in bgpio_multiple_get_masks()
275 *set_mask |= bgpio_line2mask(gc, i); in bgpio_multiple_get_masks()
287 unsigned long set_mask, clear_mask; in bgpio_set_multiple_single_reg() local
293 gc->bgpio_data |= set_mask; in bgpio_set_multiple_single_reg()
317 unsigned long set_mask, clear_mask; in bgpio_set_multiple_with_clear() local
321 if (set_mask) in bgpio_set_multiple_with_clear()
[all …]
A Dgpiolib.h80 unsigned long *set_mask; member
A Dgpiolib.c2852 gpio_chip_set_multiple(array_info->chip, array_info->set_mask, in gpiod_set_array_value_complex()
2855 i = find_first_zero_bit(array_info->set_mask, array_size); in gpiod_set_array_value_complex()
2922 i = find_next_zero_bit(array_info->set_mask, in gpiod_set_array_value_complex()
4136 array_info->set_mask = array_info->get_mask + in gpiod_get_array()
4144 bitmap_set(array_info->set_mask, descs->ndescs, in gpiod_get_array()
4151 __clear_bit(descs->ndescs, array_info->set_mask); in gpiod_get_array()
4170 array_info->set_mask); in gpiod_get_array()
4177 array_info->set_mask); in gpiod_get_array()
4190 *array_info->get_mask, *array_info->set_mask, in gpiod_get_array()
/linux/arch/arm64/kvm/hyp/nvhe/
A Dsys_regs.c89 u64 set_mask = 0; in get_pvm_id_aa64pfr0() local
95 set_mask |= get_restricted_features_unsigned(id_aa64pfr0_el1_sys_val, in get_pvm_id_aa64pfr0()
99 set_mask |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_CSV2), in get_pvm_id_aa64pfr0()
101 set_mask |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_CSV3), in get_pvm_id_aa64pfr0()
104 return (id_aa64pfr0_el1_sys_val & allow_mask) | set_mask; in get_pvm_id_aa64pfr0()
188 u64 set_mask; in get_pvm_id_aa64mmfr0() local
190 set_mask = get_restricted_features_unsigned(id_aa64mmfr0_el1_sys_val, in get_pvm_id_aa64mmfr0()
193 return (id_aa64mmfr0_el1_sys_val & PVM_ID_AA64MMFR0_ALLOW) | set_mask; in get_pvm_id_aa64mmfr0()
/linux/drivers/net/ethernet/microchip/
A Dencx24j600-regmap.c195 unsigned int set_mask = mask & val; in regmap_encx24j600_reg_update_bits() local
201 if (set_mask & 0xff) in regmap_encx24j600_reg_update_bits()
202 ret = regmap_encx24j600_sfr_set_bits(ctx, reg, set_mask); in regmap_encx24j600_reg_update_bits()
204 set_mask = (set_mask & 0xff00) >> 8; in regmap_encx24j600_reg_update_bits()
206 if ((set_mask & 0xff) && (ret == 0)) in regmap_encx24j600_reg_update_bits()
207 ret = regmap_encx24j600_sfr_set_bits(ctx, reg + 1, set_mask); in regmap_encx24j600_reg_update_bits()
/linux/sound/soc/bcm/
A Dcygnus-pcm.c358 u32 set_mask; in disable_intr() local
365 set_mask = BIT(aio->portnum); in disable_intr()
369 writel(set_mask, aio->cygaud->audio + ESR0_MASK_SET_OFFSET); in disable_intr()
370 writel(set_mask, aio->cygaud->audio + ESR1_MASK_SET_OFFSET); in disable_intr()
371 writel(set_mask, aio->cygaud->audio + ESR3_MASK_SET_OFFSET); in disable_intr()
373 writel(set_mask, aio->cygaud->audio + ESR2_MASK_SET_OFFSET); in disable_intr()
374 writel(set_mask, aio->cygaud->audio + ESR4_MASK_SET_OFFSET); in disable_intr()
/linux/drivers/mailbox/
A Dpcc.c79 u64 set_mask; member
195 val |= reg->set_mask; in pcc_chan_reg_read_modify_write()
405 u64 preserve_mask, u64 set_mask, u64 status_mask, char *name) in pcc_chan_reg_init() argument
423 reg->set_mask = set_mask; in pcc_chan_reg_init()
/linux/drivers/mfd/
A Dssbi.c94 static int ssbi_wait_mask(struct ssbi *ssbi, u32 set_mask, u32 clr_mask) in ssbi_wait_mask() argument
101 if (((val & set_mask) == set_mask) && ((val & clr_mask) == 0)) in ssbi_wait_mask()
/linux/drivers/net/ethernet/ibm/
A Dibmveth.h73 unsigned long reset_mask, unsigned long set_mask, in h_illan_attributes() argument
80 reset_mask, set_mask); in h_illan_attributes()
/linux/sound/pci/ice1712/
A Dice1712.h354 void (*set_mask)(struct snd_ice1712 *ice, unsigned int data); member
407 ice->gpio.set_mask(ice, bits); in snd_ice1712_gpio_set_mask()
435 ice->gpio.set_mask(ice, ice->gpio.saved[1]); in snd_ice1712_restore_gpio_status()
A Dquartet.c272 ice->gpio.set_mask(ice, ~GPIO_SPI_ALL); in qtet_akm_write()
314 ice->gpio.set_mask(ice, 0xffffff); in qtet_akm_write()
405 ice->gpio.set_mask(ice, ~(tmp)); in reg_write()
429 ice->gpio.set_mask(ice, 0xffffff); in reg_write()
/linux/drivers/net/phy/
A Dbcm7xxx.c225 int set_mask, int clr_mask) in __phy_set_clr_bits() argument
234 v |= set_mask; in __phy_set_clr_bits()
244 int set_mask, int clr_mask) in phy_set_clr_bits() argument
249 ret = __phy_set_clr_bits(dev, location, set_mask, clr_mask); in phy_set_clr_bits()
/linux/arch/arm/mach-omap2/
A Dcommon.h273 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
/linux/net/iucv/
A Diucv.c269 struct iucv_cmd_set_mask set_mask; member
377 parm->set_mask.ipmask = 0xf8; in iucv_allow_cpu()
390 parm->set_mask.ipmask = 0xf8; in iucv_allow_cpu()
/linux/drivers/infiniband/hw/mlx5/
A Dfs.c109 static int check_mpls_supp_fields(u32 field_support, const __be32 *set_mask) in check_mpls_supp_fields() argument
111 if (MLX5_GET(fte_match_mpls, set_mask, mpls_label) && in check_mpls_supp_fields()
115 if (MLX5_GET(fte_match_mpls, set_mask, mpls_exp) && in check_mpls_supp_fields()
119 if (MLX5_GET(fte_match_mpls, set_mask, mpls_s_bos) && in check_mpls_supp_fields()
123 if (MLX5_GET(fte_match_mpls, set_mask, mpls_ttl) && in check_mpls_supp_fields()
A Dqp.c65 u32 set_mask; /* raw_qp_set_mask_map */ member
3710 if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) { in modify_raw_packet_qp_rq()
3757 if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) { in modify_raw_packet_qp_sq()
3836 if (raw_qp_param->set_mask & ~MLX5_RAW_QP_RATE_LIMIT) in modify_raw_packet_qp()
3844 if (raw_qp_param->set_mask) in modify_raw_packet_qp()
4226 raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID; in __mlx5_ib_modify_qp()
4257 raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT; in __mlx5_ib_modify_qp()
/linux/drivers/s390/scsi/
A Dzfcp_erp.c599 void zfcp_erp_notify(struct zfcp_erp_action *erp_action, unsigned long set_mask) in zfcp_erp_notify() argument
606 erp_action->status |= set_mask; in zfcp_erp_notify()
/linux/drivers/pinctrl/
A Dpinctrl-at91.c1467 uint32_t set_mask = (*mask & *bits) & BITS_MASK(chip->ngpio); in at91_gpio_set_multiple() local
1470 writel_relaxed(set_mask, pio + PIO_SODR); in at91_gpio_set_multiple()
/linux/drivers/net/ethernet/intel/i40e/
A Di40e_adminq_cmd.h2404 __le32 set_mask; member
/linux/fs/btrfs/
A Dioctl.c4703 u64 set_mask = flags & change_mask; in check_feature_bits() local
4706 unsupported = set_mask & ~supported_flags; in check_feature_bits()
4721 disallowed = set_mask & ~safe_set; in check_feature_bits()

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